參數(shù)資料
型號(hào)： EVAL-ADUC7039QSPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 82/92頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR ADUC7039
設(shè)計(jì)資源： ADuC7039QSPZ Gerber Files
EVAL-ADuC7039 Schematic & Brd Outline
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7039
所含物品： 板
Data Sheet
ADuC7039
Rev. D | Page 83 of 92
LIN (LOCAL INTERCONNECT NETWORK) INTERFACE
LIN PHYSICAL INTERFACE
The ADuC7039 features a high voltage physical interface
between the ARM7 MCU core and an external LIN bus. The
LIN interface operates as a slave only interface, operating from
1 kB to 20 kB and is compatible with the LIN 2.1 standard.
Frequencies below 1 kB are interpreted as 1 kB. The pull-up
resistor required for a slave node is on-chip, reducing the
need for external circuitry. Some external components are
recommended, on the LIN pin, for best performance for
EMC and fault protection (see Figure 33).
The LIN protocol is emulated using an IRQ/FIQ, dedicated
LIN timers, and the high voltage transceiver also incorporated
on chip as shown in Figure 31. The LIN is clocked from the
low power oscillator when the device is in sleep mode, and
from the core clock in normal mode.
The LIN transceiver is enabled via the 2-wire interface,
HVCFG[0]. The LIN protocol is controlled by 8 MMRs
described in the LIN MMRs section.
Figure 31. LIN Physical Interface
Figure 32. LIN Frame
BPF
INTERNAL
SHORT-CIRCUIT
TRIP REFERENCE
INTERNAL
SHORT-CIRCUIT
SENSE RESISTOR
OUTPUT
DISABLE
HV IRQ
IRQEN[10]
LIN MODE
HVCFG[0]
LIN INTERRUPT
IRQEN[5]
LIN
INTERRUPT
LOGIC
INPUT
VOLTAGE
THRESHOLD
REFERENCE
VDD
EXTERNAL
LIN PIN
VDD
MASTER ECU
PROTECTION
DIODE
MASTER ECU
PULL-UP
CLOAD
MASK
LINCS
LINBK
LINBR
LOW POWER
OSCILLATOR
LINDAT
CORE CLOCK
RxD
TxD
SHORT-CIRCUIT
CONTROL
HVCFG[1]
SCR
OVER
VOLTAGE
PROTECTION
IO_VSS
084
63-
028
13TBIT
2TBIT
>1TBIT
> = 14TBIT
8TBIT
BREAK
SYNC
STA S0
S1
S2
S3
S4
S5
S6
S7 STO
PROTECTED ID
08
46
3-
02
9
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