參數(shù)資料
型號(hào)： EVAL-ADUC7039QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 51/92頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7039
設(shè)計(jì)資源： ADuC7039QSPZ Gerber Files
EVAL-ADuC7039 Schematic & Brd Outline
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7039
所含物品： 板
Data Sheet
ADuC7039
Rev. D | Page 55 of 92
OSCCON Register
Name:
OSCCON
Address:
0xFFFF0440
Default Value:
0x00
Access:
Read/write
Function:
This 8-bit register controls the low power oscillator calibration routine.
Table 40. OSCCON MMR Bit Designations
Bit
Description
7 to 4
Reserved. Should be written as 0.
3
Calibration reset.
This bit is set by user code to reset the calibration counters and disable the calibration logic.
This bit is cleared by user code after a calibration reset.
2
OSCVAL1 reset.
This bit is set by user code to clear OSCVAL1.
This bit is cleared by user code after clearing OSCVAL1.
1
OSCVAL0 reset.
This bit is set by user code to clear OSCVAL0.
This bit is cleared by user code after clearing OSCVAL0.
0
Calibration enable.
This bit is set by user code to begin calibration.
This bit is cleared by user code to abort calibration.
OSCSTA Register
Name:
OSCSTA
Address:
0xFFFF0444
Default Value:
0x00
Access:
Read only
Function:
This 8-bit register gives the status of the low power oscillator calibration routine.
Table 41. OSCSTA MMR Bit Designations
Bit
Description
7 to 3
Reserved.
2
Oscillator calibration complete.
This bit is set by hardware on full completion of a calibration cycle.
This bit is cleared by a read of OSCVAL1.
1
Busy bit.
This bit is set by hardware if calibration is in progress.
This bit is cleared by hardware if calibration is completed.
0
Calibration finished interrupt.
This bit is set by hardware on deassertion of Bit 1.
This bit is cleared by read of OSCSTA MMR.
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