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| 型號： | EVAL-ADUC7039QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 76/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7039 |
| 設計資源： | ADuC7039QSPZ Gerber Files EVAL-ADuC7039 Schematic & Brd Outline |
| 標準包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 類型： | MCU |
| 適用于相關產品： | ADuC7039 |
| 所含物品： | 板 |
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ADuC7039
Data Sheet
Rev. D | Page 78 of 92
HIGH VOLTAGE PERIPHERAL CONTROL INTERFACE
The ADuC7039 integrates a number of high voltage circuit
functions that are controlled and monitored through a regis-
tered interface consisting of two MMRs, namely, HVCON
and HVDAT. The HVCON register acts as a command byte
interpreter allowing the microcontroller to indirectly read or
write 8-bit data (the value in HVDAT) from or to one of two
high voltage status/configuration registers. These high voltage
registers are not MMRs but registers commonly referred to as
indirect registers; that is, they can only be accessed indirectly
via the HVCON and HVDAT MMRs.
The physical interface between the HVCON register and the
indirect high voltage registers is a 2-wire (data and clock) serial
interface based on a 2.56 MHz serial clock. Therefore, there is a
finite, 10 μs (maximum) latency between the MCU core writing
a command into HVCON and that command or data reaching
the indirect high voltage registers. There is also a finite 10 μs
latency between the MCU core writing a command into
HVCON and indirect register data being read back into the
HVDAT register. A busy bit (Bit 0 of the HVCON when read by
MCU) can be polled by the MCU to confirm when a read/write
command is complete.
Figure 29 describes the top-level architecture of the high
voltage interface and related circuits. The LIN physical
interface is controlled and monitored via this interface.
The high voltage interface consists of two MMRs and two
indirect registers:
HVCON is an 8-bit register acting as a command byte
interpreter for the high voltage control interface. Bytes
written to this register are interpreted as read or write
commands to a set of two indirect registers related to the
high voltage circuits. These commands are described in
Table 56. The success of that operation can be monitored
by reading back the HVCON MMR.
HVDAT is a 12-bit register that is used to hold data to
be written indirectly to and read indirectly from the high
voltage interface registers.
HVCFG is an 8-bit register controlling the function of high
voltage circuits, accessed using HVCON and HVDAT.
HVSTA is an 8-bit read-only register reflecting the state of
the high voltage circuits. This register is not an MMR and
does not appear in the MMR memory map. It is accessed
through the HVCON registered interface, and data is read
back from this register via HVDAT. In response to a high
voltage interrupt event, the high voltage interrupt control-
ler simultaneously and automatically loads the current
value of the high voltage status register (HVSTA) into
the HVDAT register.
Figure 29. High Voltage Interface, Top-Level Block Diagram
ARM7
MCU
AND
PERIPHERALS
HIGH VOLTAGE
INTERFACE
MMRs
HVCON
HVDAT
LIN
HVCFG[2:0]
LVF
HVCFG[4]
HVCFG
(INDIRECT)
HIGH VOLTAGE
REGISTERS
HVSTA
SERIAL
INTERFACE
CONTROLLER
SERIAL
DATA
SERIAL
CLOCK
HIGH VOLTAGE
INTERRUPT
CONTROLLER
LIN S/C—HVSTA[0]
IRQ
0
84
63
-0
26
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