參數(shù)資料
型號(hào)： EVAL-ADUC7039QSPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/92頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7039
設(shè)計(jì)資源： ADuC7039QSPZ Gerber Files
EVAL-ADuC7039 Schematic & Brd Outline
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7039
所含物品： 板
ADuC7039
Data Sheet
Rev. D | Page 20 of 92
FEEMOD Register
Name:
FEEMOD
Address:
0xFFFF0E04
Default Value: 0x0000
Access:
Read/write
Function:
This register is written by user code to configure the mode of operation of the Flash/EE memory controller.
Table 12. FEEMOD MMR Bit Designation
Bit
Description
15 to 7
Not used. These bits are reserved for future functionality and should be written as 0 by user code.
6 to 5
Flash/EE security lock bits. These bits must be written as [6:5] = 1, 0 to complete the Flash/EE security protect sequence.
4
Flash/EE controller command complete interrupt enable.
This bit is set by user code to enable the Flash/EE controller to generate an interrupt upon completion of a Flash/EE command.
This bit is cleared by user code to disable the generation of a Flash/EE interrupt upon completion of a Flash/EE command.
3
Flash/EE erase/write enable.
This bit is set by user code to enable the Flash/EE erase and write access via FEECON.
This bit is cleared by user code to disable the Flash/EE erase and write access via FEECON.
2
Reserved.
1
Flash/EE controller abort enable.
This bit is set by user code to enable the Flash/EE controller abort functionality.
This bit is cleared by user code to disable the Flash/EE controller abort functionality.
0
Reserved.
FEEADR Registers
Name:
FEEADR
Address:
0xFFFF0E10
Default Value:
Updated by kernel
Access:
Read/write
Function:
This 16-bit register dictates the address upon which any Flash/EE command executed via FEECON acts.
FEEDAT Registers
Name:
FEEDAT
Address:
0xFFFF0E0C
Default Value:
0x0000
Access:
Read/write
Function:
This 16-bit register contains the data either read from, or to be written to, the Flash/EE memory.
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