參數(shù)資料
型號(hào)： EVAL-ADUC7039QSPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 37/92頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7039
設(shè)計(jì)資源： ADuC7039QSPZ Gerber Files
EVAL-ADuC7039 Schematic & Brd Outline
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7039
所含物品： 板
ADuC7039
Data Sheet
Rev. D | Page 42 of 92
Current Channel ADC Result Counter Limit Register
Name:
ADC0RCL
Address:
0xFFFF0548
Default Value: 0x0001
Access:
Read/write
Function:
This 16-bit MMR sets the number of conver-
sions required before an ADC interrupt is
generated. By default, this register is set to
0x01. The ADC counter function must be
enabled via the ADC result counter enable
bit in the ADCCFG MMR.
Current Channel ADC Result Count Register
Name:
ADC0RCV
Address:
0xFFFF054C
Default Value: 0x0000
Access:
Read only
Function:
This 16-bit, read-only MMR holds the current
number of I-ADC conversion results. It is used
in conjunction with ADC0RCL to mask I-ADC
interrupts, generating a lower interrupt rate.
When ADC0RCV = ADC0RCL, the value in
ADC0RCV resets to 0 and recommences
counting. It can also be used in conjunction
with the accumulator (ADC0ACC) to allow an
average current calculation to be undertaken.
The result counter is enabled via ADCCFG[0].
This MMR is also reset to 0 when the I-ADC is
reconfigured, that is, when the ADC0CON or
ADCMDE are written.
Current Channel ADC Threshold Register
Name:
ADC0TH
Address:
0xFFFF0550
Default Value:
0x0000
Access:
Read/write
Function:
This 16-bit MMR sets the threshold against
which the absolute value of the I-ADC
conversion result is compared. In unipolar
mode, ADC0TH[15:0] are compared and in
twos complement mode, ADC0TH[14:0] are
compared.
Current Channel ADC Accumulator Register
Name:
ADC0ACC
Address:
0xFFFF055C
Default Value:
0x00000000
Access:
Read only
Function:
This 32-bit MMR holds the current
accumulator value. The I-ADC ready bit
in the ADCSTA MMR should be used to
determine when it is safe to read this MMR.
The MMR value is reset to 0 by disabling
the accumulator in the ADCCFG MMR or
reconfiguring the current channel ADC.
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