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| 型號： | EVAL-ADUC7039QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 68/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7039 |
| 設(shè)計資源： | ADuC7039QSPZ Gerber Files EVAL-ADuC7039 Schematic & Brd Outline |
| 標準包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC7039 |
| 所含物品： | 板 |
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ADuC7039
Data Sheet
Rev. D | Page 70 of 92
GPIO Port Control Register
Name:
GPCON
Address:
0xFFFF0D00
Default Value: 0x00000000
Access:
Read/write
Function:
The 32-bit MMR selects the pin function for each port pin.
Table 50. GPCON MMR Bit Designations
Bit
Description
31 to 21
Reserved. These bits are reserved and should be written as 0 by user code.
20
GPIO_5 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_5 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_5 pin as LIN output for LIN conformance testing.
19 to 17
Reserved. These bits are reserved and should be written as 0 by user code.
16
GPIO_4 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_4 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_4 pin as LIN input for LIN conformance testing.
15 to 13
Reserved. These bits are reserved and should be written as 0 by user code.
12
GPIO_3 function select bit.
This bit is cleared by user code to 0 to configure the GPIO_3 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_3 pin as MOSI, master output, and slave input data for the SPI port.
11 to 9
Reserved. These bits are reserved and should be written as 0 by user code.
8
GPIO_2 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_2 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_2 pin as MISO, master input, and slave output data for the SPI port.
7 to 5
Reserved. These bits are reserved and should be written as 0 by user code.
4
GPIO_1 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_1 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_1 pin as SCLK, serial clock I/O for the SPI port.
3 to 1
Reserved. These bits are reserved and should be written as 0 by user code.
0
GPIO_0 function select bit.
This bit is cleared to 0 by user code to configure the GPIO_0 pin as a general-purpose I/O (GPIO) pin.
This bit is set to 1 by user code to configure the GPIO_0 pin as SS, slave select input for the SPI port.
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| EVAL-ADUC7060QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVALADUC7060QSPZU2 | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits) |
| EVAL-ADUC7061MKZ | 功能描述:開發(fā)板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
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