參數(shù)資料
型號(hào)： EVAL-ADUC7039QSPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 35/92頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7039
設(shè)計(jì)資源： ADuC7039QSPZ Gerber Files
EVAL-ADuC7039 Schematic & Brd Outline
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC7039
所含物品： 板
ADuC7039
Data Sheet
Rev. D | Page 40 of 92
ADC Configuration Register
Name:
ADCCFG
Address:
0xFFFF051C
Default Value:
0x00
Access:
Read/write
Function:
The 8-bit ADC configuration MMR controls extended functionality related to the on-chip ADCs.
Table 34. ADCCFG MMR Bit Designations
Bit
Description
7
Analog ground switch enable.
This bit is set to 1 by user software to connect the external GND_SW pin (Pin 9) to an internal 20 kΩ resistor to ground.
This bit can be used to connect and disconnect external circuits and components to ground under program control and
thereby minimize dc current consumption when the external circuit or component is not being used.
6 to 5
Not used. These bits are reserved for future functionality and should not be modified by user code.
4
Current channel ADC accumulator enable.
0 = accumulator disabled and reset to 0. The accumulator must be disabled for a full ADC conversion (ADCSTA[0] set
twice) before the accumulator can be re-enabled to ensure the accumulator is reset.
1 = accumulator enabled.
3
Current channel ADC comparator enable.
0 = comparator disabled.
1 = comparator active, interrupt asserted if absolute value of I-ADC conversion result |I| ≥ ADC0TH.
2
Not used. This bit is reserved for future functionality and should be written as 0 by user code.
1
Fast temperature sensor mode.
This bit is set by the user to enable the feature described in the Fast Temperature Conversion Mode section. When this
bit is set, ADC1CON[7:6] is temporarily ignored to produce a single fully settled result of the internal temperature
sensor. This fast conversion mode is applicable to the internal temperature sensor only.
This bit should be cleared by the user when the fast conversion is complete.
0
Current channel ADC, result counter enable.
This bit is set by the user to enable the result count mode. In this mode, an I-ADC interrupt is generated only when
ADC0RCV = ADC0RCL. This allows the I-ADC to continuously monitor current but only interrupt the MCU core after a
defined number of conversions. The voltage/temperature ADC also continues to convert if enabled, but again, only
the last conversion result is available (intermediate V/T-ADC conversion results are not stored) when the ADC counter
interrupt occurs.
Current Channel ADC Data Register
Name:
ADC0DAT
Address:
0xFFFF0520
Default Value:
0x0000
Access:
Read only
Function:
This ADC data MMR holds the 16-bit conver-
sion result from the I-ADC. The ADC does
not update this MMR if the ADC0 conversion
result ready bit (ADCSTA[0]) is set. A read of
this MMR by the MCU clears all asserted
ready flags (ADCSTA[2:0] and ADCSTA[5]).
Voltage/Temperature Channel ADC Data Register
Name:
ADC1DAT
Address:
0xFFFF0524
Default Value: 0x0000
Access:
Read only
Function:
This ADC data MMR holds the 16-bit voltage
(or temperature) conversion result from the
V/T-ADC. The ADC does not update this
MMR if the voltage (or temperature) conversion
result ready bit (ADCSTA[1] or ADCSTA[2])
is set. If I-ADC is not active, a read of this
MMR by the MCU clears all asserted ready
flags (ADCSTA[2:1] and ADCSTA[5]).
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