
PRELIMINARY
XRT86SH221
202
REV. P1.0.5
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
BIT [7:4] - Unused
BIT 3 - Z5 Insertion Type
This READ/WRITE bit-field is used to configure the Transmit STM-0 POH Processor Block to use either the Transmit
STM-0 Path - Transmit Z5 Value Register or the TPOH input pin as the source for the Z5 byte, in the outbound VC-3.
0 - Configures the Transmit STM-0 POH Processor Block to use the Transmit STM-0 Path - Transmit Z5 Value
Register (Address Location= 0x07B3).
1 - Configures the Transmit STM-0 POH Processor Block to use the TPOH input as the source for the Z5 byte, in the
outbound VC-3.
BIT 2 - Z4 Insertion Type
This READ/WRITE bit-field is used to configure the Transmit STM-0 POH Processor Block to use either the Transmit
STM-0 Path - Transmit Z4 Value Register or the TPOH input pin as the source for the Z4 byte, in the outbound VC-3.
0 - Configures the Transmit STM-0 POH Processor Block to use the Transmit STM-0 Path - Transmit Z4 Value
Register (Address Location= 0x07AF).
1 - Configures the Transmit STM-0 POH Processor Block to use the TPOH input as the source for the Z4 byte, in the
outbound VC-3.
BIT 1 - Z3 Insertion Type
This READ/WRITE bit-field is used to configure the Transmit STM-0 POH Processor Block to use either the Transmit
STM-0 Path - Transmit Z3 Value Register or the TPOH input pin as the source for the Z3 byte, in the outbound VC-3.
0 - Configures the Transmit STM-0 POH Processor Block to use the Transmit STM-0 Path - Transmit Z3 Value
Register (Address Location = 0x07AB).
1 - Configures the Transmit STM-0 POH Processor Block to use the TPOH input as the source for the Z3 byte, in the
outbound VC-3.
BIT 0 - H4 Insertion Type
This READ/WRITE bit-field is used to configure the Transmit STM-0 POH Processor Block to use either the Transmit
STM-0 Path - Transmit H4 Value Register or the TPOH input pin as the source for the H4 byte, in the outbound VC-3.
0 - Configures the Transmit STM-0 POH Processor Block to use the Transmit STM-0 Path - Transmit H4 Value
Register (Address Location= 0x07A7).
1 - Configures the Transmit STM-0 POH Processor Block to use the TPOH input as the source for the H4 byte, in the
outbound VC-3.
T
ABLE
168: T
RANSMIT
STM-0 P
ATH
C
ONTROL
R
EGISTER
- B
YTE
1 (TPCR1 0
X
0782)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Z5 Insertion
Type
Z4 Insertion
Type
Z3 Insertion
Type
H4 Insertion
Type
R/W
R/O
R/O
R/O
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0