
XRT86SH221
PRELIMINARY
191
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
REV. P1.0.5
BIT 7 - M0M1 Byte Insert Method [0]
This READ/WRITE bit-field, along with M0M1 Insert Method[1] (located in the Transmit Section - SDH Control Register
- Byte 1) are used to specify the source of the contents of the M0/M1 byte, within the transmit output STM-0 data stream.
The relationship between these two bit-fields and the corresponding source of the M0/M1 byte is presented below.
Source of M0/M1 Byte
BIT 6 - Undefined Section Overhead Byte Value Assignment
This READ/WRITE bit-field specifies the value assigned to the undefined Section Overhead Bytes.
0 - Undefined Section Overhead Bytes will be assigned the value 0x00.
1 - Undefined Section Overhead Bytes will be assigned the value 0xFF.
BIT 5 - Force Multiplex Section - Remote Defect Indicator
This READ/WRITE bit-field is used to (by software control) force the Transmit STM-0 SOH Processor Block to generate
and transmit the MS-RDI indicator to the remote terminal equipment by forcing bits-2, 1, and 0 of the K2 byte to the
value 3’b110.
0 - Normal Operation.
1 - Force MS-RDI.
N
OTE
:
This bit-field is ignored if the Transmit STM-0 SOH Processor Block is currently transmitting the Mutiplex
Section AIS (MS-AIS) indicator or LOS pattern.
BIT 4 - Force Multiplex Section - Alarm Indication Signal
This READ/WRITE bit-field is used to (by software control) force the Transmit STM-0 SOH Processor Block to generate
and transmit the MS-AIS indicator to the remote terminal equipment.
0 - Normal Operation.
1 - Force MS-AIS.
N
OTE
:
This bit-field is ignored if the Transmit STM-0 SOH Processor Block is transmitting the LOS pattern.
BIT 3 - Force LOS Pattern
This READ/WRITE bit-field is used to (by software control) force the Transmit STM-0 SOH Processor Block to transmit
the LOS (Loss of Signal) pattern to the remote terminal equipment.
0 - Normal Operation.
1 - Configures the Transmit STM-0 SOH Processor Block to transmit the LOS pattern. In this case, the Transmit STM-
0 SOH Processor Block will force all bytes (within the outbound SDH frame) to an All Zeros pattern.
T
ABLE
151: T
RANSMIT
STM-0 S
ECTION
C
ONTROL
R
EGISTER
0 (TSCR0 0
X
0703
H
)
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
M0M1 Insert
Method [0]
UDFN SOH
Value
Force
MS-RDI
Force
MS-AIS
Force
LOS Pattern
Scramble
Enable
B2 Byte
Error Insert
A1A2 Byte
Error Insert
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
M0M1 I
NSERT
M
ETHOD
[1:0]
S
OURCE
OF
M0/M1 B
YTE
0
0
From the Receive STM-0 SOH Processor Block (B2 Byte Error Count).
0
1
Obtained from the contents of the Transmit STM-0 Section - M0/M1 Byte Value register
(Address Location = 0x0737).
1
0
M0/M1 Byte is obtained from the TxSOH Serial Input Port.
1
1
From the Receive STM-0 SOH Processor Block (B2 Byte Error Count).