
XRT86SH221
PRELIMINARY
121
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
REV. P1.0.5
BIT [7:3] - Unused
BIT 2 - Section Trace Message Mismatch Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STM-0 TOH Processor block is currently declaring the
Section Trace Mismatch defect condition. The Receive STM-0 TOH Processor block will declare the Section Trace
Message Mismatch defect condition, whenever it accepts a Section Trace Message (via the J0 byte, within the incoming
STM-0 data-stream) that differs from the Expected Section Trace Message.
0 - Indicates that the Section Trace Message Mismatch Defect Condition is NOT currently being declared.
1 - Indicates that the Section Trace Message Mismatch Defect Condition is currently being declared.
BIT 1 - Section Trace Message Unstable Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STM-0 TOH Processor block is currently declaring the Sec-
tion Trace Message Unstable Defect condition. The Receive STM-0 TOH Processor block will declare the Section Trace
Message Unstable defect condition, whenever the Section Trace Message Unstable counter reaches the value 8.
The Section Trace Message Unstable counter will be incremented for each time that it receives a Section Trace message
that differs from the Expected Section Trace Message.
The Section Trace Message Unstable counter is cleared to 0 whenever the Receive STM-1 TOH Processor block has
received a given Section Trace Message 3 (or 5) consecutive times.
N
OTE
:
Receiving a given Section Trace Message 3 (or 5) consecutive times also sets this bit-field to 0.
0 - Section Trace Message Unstable defect condition is NOT currently being declared.
1 - Section Trace Message Unstable defect condition is currently being declared.
BIT 0 - AIS-L Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STM-0 TOH Processor block is currently declaring the
AIS-L (Line AIS) defect condition. The Receive STM-0 TOH Processor block will declare the AIS-L defect condition
within the incoming STM-0 data stream if bits 6, 7 and 8 (e.g., the Least Significant Bits, within the K2 byte) are set to
the value [1, 1, 1] for five consecutive STM-0 frames.
0 - Indicates that the AIS-L defect condition is NOT currently being declared.
1 - Indicates that the AIS-L defect condition is currently being declared.
T
ABLE
52: R
ECEIVE
STM-0/STM-1 T
RANSPORT
S
TATUS
R
EGISTER
1 (RTSR1 = 0
X
0206)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Section Trace
Message (J0)
Mismatch
Defect Declared
Section Trace
Message (J0)
Unstable Defect
Declared
AIS-L Defect
Declared
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0