
XRT86SH221
PRELIMINARY
181
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
REV. P1.0.5
BIT 7 - Unused
BIT 6 - Transmit Path AIS (Downstream) upon Declaration of the Unstable C2 Byte Defect Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 POH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards each of the 28 Egress Direction Transmit E1 Framer
blocks), anytime (and for the duration that) it declares the Unstable C2 Byte Defect condition within the incoming STM-
0 data-stream.
0 - Does not configure the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the Unstable C2 Byte defect condition.
1 - Configures the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the Unstable C2 Byte defect condition.
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 POH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 5 - Transmit Path AIS (Downstream) upon Declaration of the UNEQ-P (Path - Unequipped) Defect Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 POH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards each of the 28 Egress Direction Transmit E1 Framer
blocks), anytime (and for the duration that) it declares the UNEQ-P defect condition.
0 - Does not configure the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the UNEQ-P defect condition.
1 - Configures the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the UNEQ-P defect condition.
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 POH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 4 - Transmit Path AIS (Downstream) upon Declaration of the PLM-P (Path - Payload Label Mismatch) Defect
Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 POH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards each of the 28 Egress Direction Transmit E1 Framer
blocks), anytime (and for the duration that) it declares the PLM-P defect condition.
0 - Does not configure the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the PLM-P defect condition.
1 - Configures the Receive STM-0 POH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the PLM-P defect condition.Note
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 POH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 3 - Transmit Path AIS (Downstream) upon declaration of the Path Trace Message Unstable Defect Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 POH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards each of the 28 Egress Direction Transmit E1 Framer
blocks), anytime (and for the duration that) it declares the Path Trace Message Unstable defect condition within the
T
ABLE
132: R
ECEIVE
STM-0 P
ATH
- AUTO AIS C
ONTROL
R
EGISTER
(AUTOACR = 0
X
02BB)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Transmit
AIS-P
(Down-
stream)
Upon C2
Byte
Unstable
Transmit
AIS-P
(Down-
stream)
Upon
UNEQ-P
Transmit
AIS-P
(Down-
stream)
Upon PLM-P
Transmit
AIS-P
(Down-
stream)
Upon Path
Trace
Message
Unstable
Transmit
AIS-P
(Down-
stream) upon
TIM-P
Transmit
AIS-P
(Down-
stream) upon
LOP-P
Transmit
AIS-P
(Down-
stream)
Enable
R/O
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0