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參數(shù)資料
| 型號(hào)： | XRT86SH221IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | DATACOM, FRAMER, PBGA388 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-388 |
| 文件頁(yè)數(shù)： | 172/353頁(yè) |
| 文件大?。?/td> | 2330K |
| 代理商： | XRT86SH221IB |
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XRT86SH221
PRELIMINARY
163
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
REV. P1.0.5
N
OTE
:
An AIS Pointer is defined as a condition in which both the H1 and H2 bytes (within the TOH) are each set to an
All Ones pattern.
0 - Indicates that the Detection of AIS Pointer interrupt has NOT occurred since the last read of this register.
1 - Indicates that the Detection of AIS Pointer interrupt has occurred since the last read of this register.
BIT 3 - Detection of Pointer Change Interrupt Status
This RESET-upon-READ bit-field indicates whether or not the Detection of Pointer Change Interrupt has occurred since
the last read of this register.If this interrupt is enabled, then the Receive STM-0 POH Processor block will generate an
interrupt anytime it accepts a new pointer value (e.g., H1 and H2 bytes, in the TOH bytes).
0 - Indicates that the Detection of Pointer Change Interrupt has NOT occurred since the last read of this register.
1 - Indicates that the Detection of Pointer Change Interrupt has occurred since the last read of this register.
BIT 2 - Unused
BIT 1 - Change in TIM-P (Trace Identification Mismatch) Defect Condition Interrupt
This RESET-upon-READ bit-field indicates whether or not the Change in TIM-P Defect Condition interrupt has occurred
since the last read of this register.If this interrupt is enabled, then the Receive STM-0 POH Processor block will generate
an interrupt in response to either of the following events.
Whenever the Receive STM-0 POH Processor block declares the TIM-P defect condition.
Whenever the Receive STM-0 POH Processor block clears the TIM-P defect condition.
0 - Indicates that the Change in TIM-P Defect Condition Interrupt has not occurred since the last read of this register.
1 - Indicates that the Change in TIM-P Defect Condition Interrupt has occurred since the last read of this register.
BIT 0 - Change in Path Trace Identification Message Unstable Defect Condition Interrupt Status
This RESET-upon-READ bit-field indicates whether or not the Change in Path Trace Message Unstable Defect
Condition Interrupt has occurred since the last read of this register.If this interrupt is enabled, then the Receive STM-0
POH Processor block will generate this interrupt in response to either of the following events.
Whenever the Receive STM-0 POH Processor block declare the Path Trace Message Unstable Defect
Condition.
Whenever the Receive STM-0 POH Processor block clears the Path Trace Message Unstable defect
condition.
0 - Indicates that the Change in Path Trace Message Unstable Defect Condition Interrupt has NOT occurred since
the last read of this register.
1 - Indicates that the Change in Path Trace Message Unstable Defect Condition Interrupt has occurred since the last
read of this register.
BIT 7 -
New Path Trace Message Interrupt Status
This RESET-upon-READ bit-field indicates whether or not the New Path Trace Message Interrupt has occurred since
the last read of this register.
If this interrupt is enabled, then the Receive STM-0 POH Processor block will generate an interrupt anytime it has
accepted (or validated) a new Path Trace Message.
T
ABLE
111: R
ECEIVE
STM-0 P
ATH
- SDH R
ECEIVE
P
ATH
I
S
TATUS
1 (RPIS1 = 0
X
028A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
New Path
Trace
Message
Interrupt
Status
Detection of
REI-P Event
Interrupt
Status
Change in
UNEQ-P
Defect
Condition
Interrupt
Status
Change in
PLM-P
Defect
Condition
Interrupt
Status
New
C2 Byte
Interrupt
Status
Change in
C2 Byte
Unstable
Defect
Condition
Interrupt
Status
Change in
RDI-P
Unstable
Defect
Condition
Interrupt
Status
New RDI-P
Value
Interrupt
Status
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT86SH328 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86SH328_07 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86SH328IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32_1 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86SH221IB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SDH-TO-PDH, VT/TU INTGR 21 CHNL 2FRAME RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86SH221OR | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86SH328 | 制造商:EXAR 制造商全稱:EXAR 功能描述:28-CHANNEL SONET/SDH VT MAPPER REGISTER DESCRIPTION WITH M13 |
| XRT86SH328_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET |
| XRT86SH328_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:28-CHANNEL SONET/SDH VT MAPPER REGISTER DESCRIPTION WITH M13 |
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