
XRT86SH221
PRELIMINARY
155
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
REV. P1.0.5
BIT 7 - Transmit Path AIS upon Declaration of the Section Trace Message Unstable Defect Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 TOH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards the Receive STM-0 POH Processor block), anytime
it declares the Section Trace Message Unstable defect condition within the incoming STM-0 data-stream.
0 - Does not configure the Receive STM-0 TOH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever (and for the duration that) it declares the Section Trace Message Unstable defect
condition.
1 - Configures the Receive STM-0 TOH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever (and for the duration that) it declares the Section Trace Message Unstable defect
condition.
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 TOH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 6 - Transmit Path AIS (AIS-P) upon Declaration of the Section Trace Message Mismatch Defect Condition
This READ/WRITE bit-field is used to configure the Receive STM-0 TOH Processor block to automatically transmit the
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards the Receive STM-0 POH Processor blocks),
anytime (and for the duration that) it declares the Section Trace Message Mismatch defect condition within the incoming
STM-0 data stream.
0 - Does not configure the Receive STM-0 TOH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever it declares the Section Trace Mismatch defect condition.
1 - Configures the Receive STM-0 TOH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) whenever (and for the duration that) it declares the Section Trace Message Mismatch defect
condition.
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 TOH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 5 - Transmit Path AIS upon declaration of the Signal Failure (SF) defect condition
This READ/WRITE bit-field is used to configure the Receive STM-0 TOH Processor block to automatically transmit a
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards the Receive STM-0 POH Processor block), anytime
(and for the duration that) it declares the SF defect condition.
0 - Does not configure the Receive STM-0 TOH Processor block to transmit the AIS-P indicator (via the downstream
traffic) upon declaration of the SF defect.
1 - Configures the Receive STM-0 TOH Processor block to automatically transmit the AIS-P indicator (via the
downstream traffic) anytime (and for the duration that) it declares the SF defect condition.
N
OTE
:
The user must also set BIT 0 (Transmit AIS-P Enable) to 1 to configure the Receive STM-0 TOH Processor
block to automatically transmit the AIS-P indicator, in response to this defect condition.
BIT 4 - Transmit Path AIS upon declaration of the Signal Degrade (SD) defect
This READ/WRITE bit-field is used to configure the Receive STM-0 TOH Processor block to automatically transmit a
Path AIS (AIS-P) Indicator via the downstream traffic (e.g., towards the Receive STM-0 POH Processor block) anytime
(and for the duration that) it declares the SD defect condition.
T
ABLE
104: R
ECEIVE
STM-0 T
RANSPORT
- A
UTO
AIS C
ONTROL
R
EGISTER
(AAISCR = 0
X
0263)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit
AIS-P
(Down-
stream) upon
Section
Trace Mes-
sage Unsta-
ble
Transmit
AIS-P
(Down-
stream)
Upon Sec-
tion Trace
Message
Mismatch
Transmit
AIS-P
(Down-
stream) upon
SF
Transmit
AIS-P
(Down-
stream) upon
SD
Unused
Transmit
AIS-P
(Down-
stream) upon
LOF
Transmit
AIS-P
(Down-
stream) upon
LOS
Transmit
AIS-P
(Down-
stream)
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0