
APPENDIX D REVISION HISTORY
User’s Manual U16541EJ4V0UD
1075
(2/7)
Edition
Description
Applied to:
Addition of Caution 2 in 12.2 (1) Real-time output buffer registers 0L, 0H
(RTBL0, RTBH0)
Addition of Caution 3 in 12.3 (1) Real-time output port mode register 0 (RTPM0)
CHAPTER 12 REAL-TIME
OUTPUT FUNCTION (RTO)
Addition of 13.2 Functions
Modification of 13.3 Configuration
Addition of Caution 4 in 13.4 (1) A/D converter mode register 0 (ADA0M0)
Addition of Caution 2 in 13.4 (5) A/D conversion result registers n, nH
(ADA0CRn, ADA0CRnH)
Addition of 13.5.1 <9>
Addition of 13.6 (8) Standby mode
CHAPTER 13 A/D
CONVERTER
Modification of Figure 14-1 Block Diagram of D/A Converter
Modification of 14.4.2 Operation in real-time output mode
Addition of 14.4.3 (7)
CHAPTER 14 D/A
CONVERTER
Modification of 15.4 (1) UARTAn control register 0 (UAnCTL0)
Addition of Remark in 15.6.2 SBF transmission/reception format
Addition of Figure 15-15 Timing of RXDAn Signal Judged as Noise
Addition of Caution in 15.7 (2) UARTAn control register 1 (UAnCTL1)
Addition of Caution in 15.7 (3) UARTAn control register 2 (UAnCTL2)
Addition of 15.8 Cautions
CHAPTER 15
ASYNCHRONOUS SERIAL
INTERFACE A (UARTA)
Addition of Remark in 16.3 Configuration
Modification of 16.4 (1) CSIBn control register 0 (CBnCTL0)
Addition of Note 1 in 16.4 (2) CSIBn control register 1 (CBnCTL1)
Addition of Note in 16.4 (3) CSIBn control register 2 (CBnCTL2)
Modification of 16.5 Operation
Modification of 16.6 (1) SCKBn pin
Modification of 16.7 Operation Flow
CHAPTER 16 3-WIRE
VARIABLE-LENGTH SERIAL
I/O (CSIB)
Addition of Note in 17.4 (1) IIC control registers 0 to 2 (IICC0 to IICC2)
Addition of Caution in 17.4 (2) IIC status registers 0 to 2 (IICS0 to IICS2)
Addition of 17.16.3 Slave operation
CHAPTER 17 I
2C BUS
Modification of 18.3 (17) IEBus clock select register (OCKS2)
CHAPTER 18 IEBus
CONTROLLER
Modification of 20.3 Control Registers
Modification of 20.4 Transfer Targets
Modification of 20.5 Transfer Modes
Modification of 20.6 Transfer Types
Modification of 20.7 DMA Channel Priorities
Addition of 20.8 Time Related to DMA Transfer
Modification of 20.9 DMA Transfer Start Factors
2nd
Modification of 20.10 DMA Abort Factors
CHAPTER 20 DMA
FUNCTION (DMA
CONTROLLER)