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型號：	UPD703270GF-XXX-JBT
元件分類：	微控制器/微處理器
英文描述：	32-BIT, MROM, 20 MHz, RISC MICROCONTROLLER, PQFP100
封裝：	14 X 20 MM, PLASTIC, QFP-100
文件頁數(shù)：	662/1080頁
文件大小：	6965K
代理商：	UPD703270GF-XXX-JBT

CHAPTER 17 I

User’s Manual U16541EJ4V0UD

17.16.3 Slave operation

The following shows the processing procedure of the slave operation.

Basically, the operation of the slave device is event-driven.

Therefore, processing by an INTIICn interrupt

(processing requiring a significant change of the operation status, such as stop condition detection during

communication) is necessary.

The following description assumes that data communication does not support extension codes. Also, it is assumed

that the INTIICn interrupt servicing performs only status change processing and that the actual data communication is

performed during the main processing.

Figure 17-20. Software Outline During Slave Operation

INTIICn signal

Setting, etc.

Main processing

Interrupt servicing

Therefore, the following three flags are prepared so that the data transfer processing can be performed by

transmitting these flags to the main processing instead of INTIICn signal.

(1) Communication mode flag

This flag indicates the following communication statuses.

Data communication not in progress

Communication mode: Data communication in progress (valid address detection stop condition detection, ACK

from master not detected, address mismatch)

(2) Ready flag

This flag indicates that data communication is enabled. This is the same status as an INTIICn interrupt during

normal data transfer. This flag is set in the interrupt processing block and cleared in the main processing block.

The ready flag for the first data for transmission is not set in the interrupt processing block, so the first data is

transmitted without clear processing (the address match is regarded as a request for the next data).

(3) Communication direction flag

This flag indicates the direction of communication and is the same as the value of IICSn.TRCn bit.

The following shows the operation of the main processing block during slave operation.

2C0n and wait for the communication enabled status. When communication is enabled, perform transfer

using the communication mode flag and ready flag (the processing of the stop condition and start condition is

performed by interrupts, conditions are confirmed by flags).

For transmission, repeat the transmission operation until the master device stops returning ACK. When the master

device stops returning ACK, transfer is complete.

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