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型號(hào)：	UPD703270GF-XXX-JBT
元件分類：	微控制器/微處理器
英文描述：	32-BIT, MROM, 20 MHz, RISC MICROCONTROLLER, PQFP100
封裝：	14 X 20 MM, PLASTIC, QFP-100
文件頁(yè)數(shù)：	730/1080頁(yè)
文件大?。?/td>	6965K
代理商：	UPD703270GF-XXX-JBT

CHAPTER 18 IEBus CONTROLLER

User’s Manual U16541EJ4V0UD

18.4.3 Interrupt source list

The interrupt request signals of the internal IEBus controller in the V850ES/SG2 can be classified into vector

interrupts and DMA transfer interrupts. These interrupt request signals can be specified via software manipulation.

The interrupt sources are listed below.

Table 18-17. Interrupt Source List

Condition of Generation

Interrupt Source

Software Processing After

Generation of Interrupt Request

Timing error

Master/slave

Other than data

(individual)

Parity error

NACK reception

(Transmission)

Other than data

(individual)

Underrun error

Transmission

Overrun error

Communication

Transmission

Undo communication processing

Communication error is logical

sum (OR) output of timing

error, parity error, NACK

reception error, underrun error,

overrun error, and write error.

Slave/address

Slave request judgment

Arbitration judgment

(If lost, remaster processing)

Communication preparation

Interrupt always occurs if lost in

arbitration during master

Start interrupt

Slave/address

Slave request judgment

Communication preparation

Generated only during slave

Status transmission

Refer to transmission processing

example such as slave status.

Interrupt occurs regardless of

slave transmission enable flag

Interrupt occurs if NACK is

returned in the control field.

Transmission

DMA transfer end processing

End of communication

DMA transfer end processing

Receive data processing

Set if SCR register is cleared to

Transmission

Retransmission preparation

End of frame

Re-reception preparation

Set if CCR register is cleared to

Transmit data write

Transmission

Reading of transmit data

Set after transfer transmission

data to internal shift register

This does not occur when the

last data is transferred.

Receive data read

Reading of received data

Set after normal data reception

If DMA transfer or software manipulation is not executed.

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