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型號：	UPD703270GF-XXX-JBT
元件分類：	微控制器/微處理器
英文描述：	32-BIT, MROM, 20 MHz, RISC MICROCONTROLLER, PQFP100
封裝：	14 X 20 MM, PLASTIC, QFP-100
文件頁數(shù)：	501/1080頁
文件大?。?/td>	6965K
代理商：	UPD703270GF-XXX-JBT

CHAPTER 13 A/D CONVERTER

User’s Manual U16541EJ4V0UD

(10) High-speed conversion mode

In the high-speed conversion mode, rewriting of the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and ADA0PFT

registers and trigger input during the stabilization time are prohibited.

(11) A/D conversion time

A/D conversion time is the total time of stabilization time, conversion time, wait time, and trigger response

time (for details of these times, refer to Table 13-2 Conversion Time Selection in Normal Conversion

Mode (ADA0HS1 Bit = 0) and Table 13-3 Conversion Time Selection in High-Speed Conversion Mode

(ADA0HS1 Bit = 1)).

During A/D conversion in the normal conversion mode, if the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and

ADA0PFT registers are written or a trigger is input, reconversion is carried out. However, if the stabilization

time end timing conflicts with the writing to these registers, or if the stabilization time end timing conflicts with

the trigger input, the stabilization time of 64 clocks is reinserted.

If it conflicts again with the reinserted stabilization time end timing, the stabilization time is reinserted.

Therefore do not set the trigger input interval and control register write interval to 64 clocks or below.

(12) Variation of A/D conversion results

The results of the A/D conversion may vary depending on the fluctuation of the supply voltage, or may be

affected by noise. To reduce the variation, take counteractive measures with the program such as averaging

the A/D conversion results.

(13) A/D conversion result hysteresis characteristics

The successive comparison type A/D converter holds the analog input voltage in the internal sample & hold

capacitor and then performs A/D conversion. After the A/D conversion has finished, the analog input voltage

remains in the internal sample & hold capacitor. As a result, the following phenomena may occur.

When the same channel is used for A/D conversions, if the voltage is higher or lower than the previous A/D

conversion, then hysteresis characteristics may appear where the conversion result is affected by the

previous value. Thus, even if the conversion is performed at the same potential, the result may vary.

When switching the analog input channel, hysteresis characteristics may appear where the conversion

result is affected by the previous channel value. This is because one A/D converter is used for the A/D

conversions. Thus, even if the conversion is performed at the same potential, the result may vary.

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