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型號：	UPD703270GF-XXX-JBT
元件分類：	微控制器/微處理器
英文描述：	32-BIT, MROM, 20 MHz, RISC MICROCONTROLLER, PQFP100
封裝：	14 X 20 MM, PLASTIC, QFP-100
文件頁數(shù)：	768/1080頁
文件大?。?/td>	6965K
代理商：	UPD703270GF-XXX-JBT

CHAPTER 19 CAN CONTROLLER

User’s Manual U16541EJ4V0UD

Figure 19-17. Recovery from Bus-off State Through Normal Recovery Sequence

error-passive

≤ TEC[7:0] ≤ FFH

(written by user)

(read by user)

FFH < TEC [7:0]

bus-off-recovery-sequence

error-active

≤ TEC[7:0] < 80H

≤ REC[7:0] < 80H

≤ REC[7:0] ≤ 80H

(b) Forced recovery operation that skips bus-off recovery sequence

The CAN module can be forcibly released from the bus-off state, regardless of the bus state, by skipping

the bus-off recovery sequence. Here is the procedure.

First, the CAN module requests to enter the initialization mode. For the operation and points to be noted

at this time, see 19.3.6 (5) (a) Recovery from bus-off state through normal recovery sequence.

Next, the module requests to enter an operation mode. At the same time, the C0CTRL.CCERC bit must

be set to 1.

As a result, the bus-off recovery sequence defined by the CAN protocol ISO 11898 is skipped, and the

module immediately enters the operation mode. In this case, the module is connected to the CAN bus

after it has monitored 11 consecutive recessive-level bits. For details, refer to the processing in Figure

This function is not defined by the CAN protocol ISO 11898. When using this function,

thoroughly evaluate its effect on the network system.

(6) Initializing CAN module error counter register (C0ERC) in initialization mode

If it is necessary to initialize the C0ERC and C0INFO registers for debugging or evaluating a program, they

can be initialized to the default value by setting the C0CTRL.CCERC bit in the initialization mode. When

initialization has been completed, the CCERC bit is automatically cleared to 0.

Cautions 1. This function is enabled only in the initialization mode. Even if the CCERC bit is set to 1

in a CAN operation mode, the C0ERC and C0INFO registers are not initialized.

2. The CCERC bit can be set at the same time as the request to enter a CAN operation

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