
CHAPTER 19 CAN CONTROLLER
User’s Manual U16541EJ4V0UD
783
Figure 19-28. Transition to Operation Modes
CAN module
channel invalid
[Receive-only mode]
OPMODE[2:0]=03H
OPMODE[2:0] = 00H
and CAN bus is busy.
OPMODE[2:0] = 03H
[Single-shot mode]
OPMODE[2:0]=04H
OPMODE[2:0] = 04H
OPMODE[2:0] = 05H
INIT mode
OPMODE[2:0] = 00H
EFSD = 1
and GOM = 0
All CAN modules are
in INIT mode and GOM = 0
GOM = 1
RESET
RESET released
[Normal operation
mode with ABT]
OPMODE[2:0]=02H
OPMODE[2:0] = 00H
and CAN bus is busy.
OPMODE[2:0] = 00H
and interframe space
OPMODE[2:0] = 02H
OPMODE[2:0] = 01H
OPMODE[2:0] = 00H
and CAN bus is busy.
[Normal operation
mode]
OPMODE[2:0]=01H
OPMODE[2:0] = 00H
and CAN bus is busy.
OPMODE[2:0] = 00H
and interframe space
OPMODE[2:0] = 00H
and interframe space
OPMODE[2:0] = 00H
and interframe space
OPMODE[2:0] = 00H
and interframe space
OPMODE[2:0] = 00H
and CAN bus is busy.
[Self-test mode]
OPMODE[2:0]=05H
The transition from the initialization mode to an operation mode is controlled by the C0CTRL.OPMODE2 to
C0CTRL.OPMODE0 bits.
Changing from one operation mode into another requires shifting to the initialization mode in between. Do not
change one operation mode to another directly; otherwise the operation will not be guaranteed.
Requests for transition from an operation mode to the initialization mode are held pending when the CAN bus is not
in the interframe space (i.e., frame reception or transmission is in progress), and the CAN module enters the
initialization mode at the first bit in the interframe space (the values of the OPMODE2 to OPMODE0 bits are changed
to 00H). After issuing a request to change the mode to the initialization mode, read the OPMODE2 to OPMODE0 bits
until their values become 000B to confirm that the module has entered the initialization mode (see Figure 19-36).
19.8.5 Resetting error counter C0ERC of CAN module
If it is necessary to reset the C0ERC and C0INFO registers when re-initialization or forced recovery from the bus-
off status is made, set the C0CTRL.CCERC bit to 1 in the initialization mode. When this bit is set to 1, the C0ERC
and C0INFO registers are cleared to their default values.