
CHAPTER
4
P
O
RT
FU
NCTI
O
NS
User’s
Manual
U1
6541EJ4V0UD
175
Table 4-15. Using Port Pin as Alternate-Function Pin (1/7)
Pin Name
Alternate Function
Name
I/O
Pnx Bit of
Pn Register
PMnx Bit of
PMn Register
PMCnx Bit of
PMCn Register
PFCEnx Bit of
PFCEn Register
PFCnx Bit of
PFCn Register
Other Bits
(Registers)
P02 = Setting not required
P03 = Setting not required
P04 = Setting not required
P05 = Setting not required
P06 = Setting not required
P10 = Setting not required
P11 = Setting not required
P30 = Setting not required
P31 = Setting not required
P32 = Setting not required
P33 = Setting not required
P34 = Setting not required
P35 = Setting not required
P02
P03
P04
P05
P06
P10
P11
P30
P31
P32
P33
P34
P35
NMI
INTP0
ADTRG
INTP1
INTP2
DRST
Note 1
INTP3
ANO0
ANO1
TXDA0
SOB4
RXDA0
INTP7
SIB4
ASCKA0
SCKB4
TIP00
TOP00
TIP01
TOP01
TIP10
TOP10
TIP11
TOP11
Input
Output
Input
I/O
Input
Output
Input
Output
Input
Output
Input
Output
OCDM0 (OCDM) = 1
PM02 = Setting not required
PM03 = Setting not required
PM04 = Setting not required
PM05 = Setting not required
PM06 = Setting not required
PM10 = 1
PM11 = 1
PM30 = Setting not required
PM31 = Setting not required
PM32 = Setting not required
PM33 = Setting not required
PM34 = Setting not required
PM35 = Setting not required
PMC02 = 1
PMC03 = 1
PMC04 = 1
PMC05 = 1
PMC05 = Setting not required
PMC06 = 1
PMC30 = 1
PMC31 = 1
PMC32 = 1
PMC33 = 1
PMC34 = 1
PMC35 = 1
PFC03 = 0
PFC03 = 1
PFC30 = 0
PFC30 = 1
Note 2, PFC31 = 0
PFC31 = 1
PFC32 = 0
PFC32 = 1
PFC32 = 0
PFC32 = 1
PFC33 = 0
PFC33 = 1
PFC34 = 0
PFC34 = 1
PFC35 = 0
PFC35 = 1
PFCE32 = 0
PFCE32 = 1
Notes 1. Flash memory versions only
2. The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as the RXDA0 pin, disable edge detection for the alternate-function
INTP7 pin (clear the INTF3.INTF31 bit and INTR3.INTR31 bit to 0). When using the pin as the INTP7 pin, stop the UARTA0 reception operation (clear
the UA0CTL0.UA0RXE bit to 0).
Caution
When using one of the P10 and P11 pins as an I/O port and the other as a D/A output pin (ANO0, ANO1), do so in an application where the port
I/O level does not change during D/A output.