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參數(shù)資料
| 型號(hào)： | T7698 |
| 廠商： | Lineage Power |
| 英文描述： | Quad T1/E1 Line Interface and Octal T1/E1 Monitor(四T1/E1線接口和八T1/E1監(jiān)控器) |
| 中文描述： | 四T1/E1線路接口和八路的T1/E1監(jiān)視器（四個(gè)T1/E1線接口和八T1/E1的監(jiān)控器） |
| 文件頁數(shù)： | 9/112頁 |
| 文件大小： | 1359K |
| 代理商： | T7698 |
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Data Sheet
January 1999
T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor
9
Lucent Technologies Inc.
Features
(continued)
The octal frame monitor section frames on the eight channels (four in the transmit direction and four in the receive
direction, as shown in Figure 1) and performs monitoring, alarm reporting, and maintenance signalling. Registers
and counters (unique to each one of the eight channels) report on bipolar violations, frame bit errors, CRC errors,
and alarms. The block diagram of the octal frame monitor is shown in Figure 16. Both DS1 (D4, SLC-96, DDS,
ESF) and CEPT (with and without CRC-4) framing formats are supported. The facility data link section allows
extraction of data from the facility data link in the SLC-96, DDS, ESF, and CEPT framing formats. Both HDLC and
transparent mode are supported. Access to the facility data link is through a 64-byte FIFO which is capable of hold-
ing multiple frames. The facility data link also monitors the ANSI performance report messages (PRM) and detects
the ANSI ESF bit-oriented messages.
Block Diagram
5-5249(F)r.4
Figure 1. T7698 Block Diagram
A[3:0]
AD[7:0]
RDY_DTACK
INT
WR_DS
RD_R/W
ALE_AS
CS
MPMUX
MPMODE
MPCLK
RCLK[4:1]
RND[4:1]
TTIP[4:1]
TRING[4:1]
BCLK
ICT
LOXC
QUAD
LINE
INTERFACE
UNIT
RTIP[4:1]
RRING[4:1]
QUAD
TRANSMIT
SECTION
QUAD
RECEIVE
SECTION
RESET
4
4
4
4
4
4
4
4
4
XCLK
4
4
4
OCTAL RECEIVE
FRAME MONITOR
AND FDL MONITOR
MICRO-
PROCESSOR
INTERFACE
RPD[4:1]
TPD[4:1]
TND[4:1]
TCLK[4:1]
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