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參數(shù)資料
| 型號： | T8102 |
| 廠商： | Lineage Power |
| 英文描述： | H.100/H.110 Interface and Time-Slot Interchanger(H.100/H.110接口和干線時隙交換機) |
| 中文描述： | H.100/H.110接口和時隙交換器（H.100/H.110接口和干線時隙交換機） |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 222K |
| 代理商： | T8102 |
Product Brief
May 1998
Ambassador
TM
T8102
H.100/H.110 Interface and Time-Slot Interchanger
Features
I
Complete solution for interfacing board-level
circuitry to the H.100/H.110 telephony bus
I
H.100/H.110 compliant interface; all mandatory
signals
I
Includes 2 CT_NETREF pins
I
Programmable connections to any of the 4096 time
slots on the H.100/H.110 bus
I
Up to 16 local serial inputs and 16 local serial
outputs, programmable for 2.048 Mbits/s,
4.096 Mbits/s, and 8.192 Mbits/s operation per CHI
specifications
I
Programmable switching between local time slots
and H.100/H.110 bus, up to 512 connections
I
Choice of frame integrity or minimum latency
switching on a per-time-slot basis:
— Frame integrity to ensure proper switching of
wideband data
— Minimum latency switching to reduce delay in
voice channels
I
On-chip phase-locked loop (PLL) for H.100/H.110,
MVIP*, or Dialogics
SC-bus clock operation in
master or slave clock modes
I
Serial TDM bus rate and format conversion
between most standard buses
I
Optional 8-bit parallel input and/or 8-bit parallel
output for local TDM interfaces
I
High-performance microprocessor interface:
— Provides access to device configuration regis-
ters and to time-slot data
— Supports both Motorola
nonmultiplexed and
Intel
§
multiplexed/nonmultiplexed modes
I
Subrate switching of nibbles, dibits, or bits
I
Programmable GPIO
I
Local-to-local switching through the H-bus content
addressable memories (CAMs)
I
Two independently programmable groups of up to
12 framing signals each
I
3.3 V local I/O with 5 V tolerant inputs and TTL-
compatible outputs
I
Boundary-scan testing support
I
208-pin, plastic SQFP
I
217-pin BGA package
Applications
I
Computer-telephony systems
I
Enhanced service platforms
I
WAN access devices
I
PBXs
Description
The AmbassadorT8102 is an H.100/H.110-compli-
ant device that provides a complete interface
between the H.100/H.110 bus and a wide variety of
telephony interface components, processors, and
other circuits. The bus interface provides all signals
needed for the H.100/H.110 bus, the H-MVIPand
MVIP-90 buses, or the SC-bus. Local interfaces
include sixteen serial inputs and sixteen serial out-
puts based on the Lucent concentration highway
interface (CHI). One built-in time-slot interchanger is
included. It supports up to 512 programmable con-
nections between any time slot on the H.100/H.110
bus and any time slot in the local switching domain.
The AmbassadorT8102 is configured via a micropro-
cessor interface. This interface can also read and
write time-slot and device data.
* MVIPis a trademark of Natural MicroSystems Corporation.
Dialogic s a registered trademark of Dialogic Corporation.
Motorolais a registered trademark of Motorola, Inc.
§ Intelis a registered trademark of Intel Corporation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T8102A | 制造商:AGERE 制造商全稱:AGERE 功能描述:H.100/H.110 Interface and Time-Slot Interchangers |
| T810-400B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH PERFORMANCE TRIACS |
| T8105A | 制造商:AGERE 制造商全稱:AGERE 功能描述:H.100/H.110 Interface and Time-Slot Interchangers |
| T810-600B | 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB |
| T810-600B | 制造商:STMicroelectronics 功能描述:TRIAC 8A 600V D-PAK |
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