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參數(shù)資料
| 型號： | T7698 |
| 廠商： | Lineage Power |
| 英文描述： | Quad T1/E1 Line Interface and Octal T1/E1 Monitor(四T1/E1線接口和八T1/E1監(jiān)控器) |
| 中文描述： | 四T1/E1線路接口和八路的T1/E1監(jiān)視器（四個(gè)T1/E1線接口和八T1/E1的監(jiān)控器） |
| 文件頁數(shù)： | 70/112頁 |
| 文件大?。?/td> | 1359K |
| 代理商： | T7698 |
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Data Sheet
January 1999
T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor
70
Lucent Technologies Inc.
Frame Monitors
(continued)
Alarms and Performance Monitoring
(continued)
The error events monitored by the T7698 counters are as follows.
For errored second and severely errored second processing, the error conditions to be monitored are programma-
ble and can be selected by writing to registers Framer_PR4—Framer_PR7. Furthermore, the thresholds for errored
seconds, bursty errored seconds, and severely errored seconds can also be made programmable by setting
Framer_PR2, bit 3 (THR_ENABLE) high, and writing the desired threshold values in registers
Framer_PR8—Framer_PR11. An optional mode where the threshold values are hardwired can be selected by set-
ting THR_ENABLE = 0 (hardwired values are shown in the following tables).
Table 43. T7698 Event Counters Definition
Error Event
T7698 Mode
Definition
Counter Size
(bits)
16
Bipolar Violations
(BPVs)
AMI
Any bipolar violation or occurrence of any
zero string length greater than 15
consecutive zeros.
Any noncode bipolar violation, code
violation, or occurrence of any zero string
length greater than seven contiguous zeros.
Any noncode bipolar violation, code
violation, or occurrence of any zero string
length greater than three contiguous zeros.
Any F
T
bit error.
Any F
T
bit error.
Any F
T
, F
S
, or time slot 24 FAS bit error.
Any F
E
bit error.
Any FAS (0011011) or NOT FAS (bit 2) bit
error.
Any received checksum in error.
E bits = 0.
B8ZS
HDB3
Framing Bit Errors
(FERs)
SF:D4
SF:SLC-96
SF:DDS
ESF
CEPT
16
CRC Errors
Received E Bits = 0 CEPT with CRC
ESF or CEPT with CRC
16
16
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