參數(shù)資料
型號： OR4E02-2BM680I
英文描述： FPGA
中文描述： FPGA的
文件頁數(shù)： 142/153頁
文件大?。?/td> 2737K
代理商： OR4E02-2BM680I
142
Lattice Semiconductor
Data Sheet
November, 2002
ORCA
Series 4 FPGAs
Package
Thermal
Characteristics
Summary
There
are
three
thermal
parameters
that
are
in
common
use:
Θ
JA
,
ψ
JC,
and
Θ
JC
.
It
should
be
noted
that
all
the
parameters
are
affected,
to
varying
degrees,
by
package
design
(including
paddle
size)
and
choice
of
materials,
the
amount
of
copper
in
the
test
board
or
system
board,
and
system
airflow.
Θ
JA
This
is
the
thermal
resistance
from
junction
to
ambient
(theta-JA,
R-theta,
etc.):
where
T
J
is
the
junction
temperature,
T
A,
is
the
ambient
air
temperature,
and
Q
is
the
chip
power.
Experimentally,
Θ
JA
is
determined
when
a
special
thermal
test
die
is
assembled
into
the
package
of
interest,
and
the
part
is
mounted
on
the
thermal
test
board.
The
diodes
on
the
test
chip
are
separately
calibrated
in
an
oven.
The
package/board
is
placed
either
in
a
JEDEC
natural
convection
box
or
in
the
wind
tunnel,
the
latter
for
forced
con-
vection
measurements.
A
controlled
amount
of
power
(Q)
is
dissipated
in
the
test
chip’s
heater
resistor,
the
chip’s
temperature
(T
J
)
is
determined
by
the
forward
drop
on
the
diodes,
and
the
ambient
temperature
(T
A
)
is
noted.
Note
that
Θ
JA
is
expressed
in
units
of
°C/watt.
ψ
JC
This
JEDEC
designated
parameter
correlates
the
junction
temperature
to
the
case
temperature.
It
is
generally
used
to
infer
the
junction
temperature
while
the
device
is
operating
in
the
system.
It
is
not
considered
a
true
ther-
mal
resistance,
and
it
is
defined
by:
where
T
C
is
the
case
temperature
at
top
dead
center,
T
J
is
the
junction
temperature,
and
Q
is
the
chip
power.
Dur-
ing
the
Θ
JA
measurements
described
above,
besides
the
other
parameters
measured,
an
additional
temperature
reading,
T
C
,
is
made
with
a
thermocouple
attached
at
top-dead-center
of
the
case.
ψ
JC
is
also
expressed
in
units
of
°C/W.
Θ
JA
T
J
------Q
T
A
–
=
ψ
JC
T
J
--------------------
T
C
–
Q
=
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