參數(shù)資料
型號(hào)： OR3L225B
廠商： Lineage Power
英文描述： Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
中文描述： 現(xiàn)場可編程門陣列（現(xiàn)場可編程門陣列）
文件頁數(shù)： 11/88頁
文件大?。?/td> 2015K
代理商： OR3L225B
Lucent Technologies Inc.
11
Data Addendum
December 1999
ORCA OR3LxxxB Series FPGAs
Description
(continued)
ORCA
Foundry
Development System
The ORCAFoundry development system is used to
process a design from a netlist to a configured FPGA.
This system is used to map a design onto the ORCA
architecture and then place and route it using ORCA
Foundry’s timing-driven tools. The development system
also includes interfaces to, and libraries for, other popu-
lar CAE tools for design entry, synthesis, simulation,
and timing analysis.
The ORCAFoundry development system interfaces to
front-end design entry tools and provides the tools to
produce a configured FPGA. In the design flow, the
user defines the functionality of the FPGA at two points
in the design flow: at design entry and at the bit stream
generation stage.
Following design entry, the development system’s map,
place, and route tools translate the netlist into a routed
FPGA. A static timing analysis tool is provided to deter-
mine device speed, and a back-annotated netlist can
be created to allow simulation.
Timing and simulation output files from ORCAFoundry
are also compatible with many third-party analysis
tools. Its bit stream generator is then used to generate
the configuration data, which is loaded into the FPGA’s
internal configuration RAM.
When using the bit stream generator, the user selects
options that affect the functionality of the FPGA. Com-
bined with the front-end tools, ORCAFoundry pro-
duces configuration data that implements the various
logic and routing options discussed in this product
brief.
Additional Information
Contact your local Lucent Technologies representative
for additional information regarding the ORCA
OR3LxxxB FPGA devices, or visit our website at:
http://www.lucent.com/orca
.
相關(guān)PDF資料
PDF描述
OR3LP26B Field-Programmable System Chip，Embedded Master/Target PCI Bus Interface(現(xiàn)場可編程系統(tǒng)芯片，嵌入式主機(jī)/從機(jī)PCI總線接口)
OR4E10 Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
OR4E14 Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
OR4E2 Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
OR4E4 Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OR3L225B7BC432-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3L225B7BC432I-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3L225B7BM680-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3L225B7BM680I-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3L225B8BC432-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*