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| 型號： | OR3L225B |
| 廠商： | Lineage Power |
| 英文描述： | Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列) |
| 中文描述： | 現(xiàn)場可編程門陣列（現(xiàn)場可編程門陣列） |
| 文件頁數(shù)： | 10/88頁 |
| 文件大小： | 2015K |
| 代理商： | OR3L225B |
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10
Lucent Technologies Inc.
Data Addendum
December 1999
ORCA OR3LxxxB Series FPGAs
Description
(continued)
Series 3L I/Os and 5 V Tolerance
Series 3L devices use the same I/O structure as ORCA
Series 3T devices. ORCA Series 3L devices use a
3.3 V supply (V
DD
) to power the I/Os and a 2.5 V sup-
ply (V
DD
2) to power the internal logic. Because the I/O
structure and voltage is common between 3T and 3L
devices, the Series 3L devices maintain 5 V tolerance
and the same I/O characteristics as Series 3T devices.
The OR3LxxxB uses a default mode that maintains a
5 V tolerant setting on all I/Os.
Designing with ORCASeries 3T Parts with
Series 3L in Mind
Due to many package compatibilities across device
sizes and families, it is possible to design using a
Series 3T device today, and migrate to a Series 3L
device later. The pinouts are the same on both families
with the exception of additional I/O voltage pins for the
Series 3L family.
To design a board that is both Series 3T compatible
and Series 3L compatible, using the following proce-
dures will allow easy and fast component swapping
from Series 3T to Series 3L.
Design to the Series 3L pinouts, especially if planning
to use the OR3L225B pinout. The OR3L225B has addi-
tional power pins that are not on smaller Series 3L
parts. (Note that if the designer is using a Series 3L
device smaller than the OR3L225B, but may eventually
migrate to a OR3L225B, the OR3L225B pinout should
also be used). Designing for Series 3L in this manner
does sacrifice some user I/O pins available in the
Series 3T (or smaller Series 3L devices if using the
OR3L225B). These I/Os will have power applied to
them when a Series 3T device is used on the board.
However, this is acceptable and these I/Os will default
to 3-state outputs which eliminates any contention risk.
Design with two power planes: one for the internal sup-
ply (2.5 V), and one for the I/O supply (3.3 V). For
Series 3T operation, connect both the internal supply
and I/O voltage planes to 3.3 V. For Series 3L opera-
tion, change the core plane connection from 3.3 V to
2.5 V.
Powerup Sequencing for Series 3L Devices
ORCA Series 3L devices use two power supplies: one
to power the device I/Os (V
DD
) which is set to 3.3 V for
3.3 V operation and 5 V tolerance, and another supply
for the internal logic (V
DD
2) which is set to 2.5 V. It is
understood that many users will derive the 2.5 V core
logic supply from a 3.3 V power supply, so the following
recommendations are made as to the powerup
sequence of the supplies and allowable delays
between power supplies reaching stable voltages.
In general, both the 3.3 V and the 2.5 V supplies should
ramp-up and become stable as close together in time
as possible. There is no delay requirement if the V
DD
2
(2.5 V) supply becomes stable prior to the V
DD
(3.3 V)
supply. There is a delay requirement imposed if the
V
DD
supply becomes stable prior to the V
DD
2 supply.
The requirement is that the V
DD
2 (2.5 V) supply transi-
tions from 0.8 V to 2.3 V within 15.7 ms when the V
DD
(3.3 V) supply is already stable at a minimum of 3.0 V. If
the chosen power supplies cannot meet this delay
requirement, it is always possible to delay configuration
of the FPGA by asserting INIT or PRGM until the V
DD
2
supply has reached 2.3 V. This process eliminates any
power supply sequencing issues.
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| OR3L225B7BC432-DB | 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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| OR3L225B7BM680-DB | 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| OR3L225B7BM680I-DB | 功能描述:FPGA - 現(xiàn)場可編程門陣列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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