參數(shù)資料
型號： OMAP5910(RISC)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 68/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(RISC)
Functional Overview
56
August 2002 Revised August 2003
SPRS197B
1.6-V
Voltage
Supply
CVDD
CVDD1
CVDD4
CVDDA
CVDD3
CVDD2
DVDD1
DVDD2
DVDD3
DVDD4
DVDD5
VSS
OMAP5910
Vout = 1.6 V
3.3-V
Voltage
Supply
Vout = 3.3 V
1.8-V
Voltage
Supply
Vout = 1.8 V
Figure 35. Supply Connections for a System With 1.8-V SDRAM
In the previous two examples, all CV
DDx
pins are connected in common. However, the OMAP5910 device
has dedicated CV
DD
pins which supply power to different sections of the chip (as described in Table 23,
Signal Descriptions). This feature could be useful in prototyping phases to troubleshoot power management
features and perform advanced power. By isolating each CV
DDx
bus from the power source through isolation
jumpers or current sense resistors, the current draw into different domains may be measured separately. This
type of supply isolation should only be done during prototyping as production system designs should connect
all the CV
DDx
pins together, preferably to a common board plane.
NOTE: There is no specific power sequencing for the different voltage supplies as long as all CV
DDx
and
DV
DDx
voltages are ramped to valid operating levels within 500 ms of one another. Additionally, if certain I/O
pins are unused in a specific system application, the DV
DDx
supply pins which power these I/O must still be
connected to valid operating voltage levels. See Section 5.2,
Recommended Operating Conditions
, for
complete voltage requirements on all CV
DDx
and DV
DDx
power supply pins.
3.14.2
Core Voltage Noise Isolation
Two of the CV
DD
pins on the OMAP5910 device, CV
DDA
and CV
DD4
, are dedicated to supply power for the
ULPD DPLL and OMAP DPLL, respectively. In addition to using sound board design principles, these
dedicated pins allow for added supply noise isolation circuitry to enable maximum performance from the
OMAP5910 DPLLs. An example circuit is shown in Figure 36.
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