參數(shù)資料
型號(hào)： OMAP5910(RISC)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 16/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(RISC)
Introduction
4
August 2002 Revised August 2003
SPRS197B
2.2
Terminal Assignments
Figure 21 illustrates the ball locations for the 289-ball GZG ball grid array (BGA) package and is used in
conjunction with Table 21 to locate signal names and ball grid numbers. GZG BGA ball numbers in Table 21
are read from left-to-right, top-to-bottom.
8
L
B
A
1
F
D
C
E
H
K
G
J
3
2
4
7
5
6
R
M
P
N
V
T
U
W
AA
Y
15
11
9
10
13
12 14
18
17
16
21
19
20
Figure 21. OMAP5910 GZG MicroStar BGA
Package (Bottom View)
In Table 21, signals with multiplexed functions are highlighted in gray. Signals with a multiplexed pin name
are separated with forward slashes as follows:
signal1/signal2/signal3
(for example, GPIO11/HDQ)
Signals which are associated with specific peripherals are denoted by using the peripheral name, followed
by a period, and then the signal name; as follows:
peripheral1.signal1
(for example, MCBSP1.DR)
Table 21. GZG BGA Terminal Assignments
GZG
BGA
BALL #
A1
A7
A15
A21
B4
B8
B13
B17
B21
C4
C8
C12
SIGNAL
GZG
BGA
BALL #
A2
A9
A17
B1
B5
B9
B14
B18
C1
C5
C9
C13
SIGNAL
GZG
BGA
BALL #
A3
A11
A19
B2
B6
B10
B15
B19
C2
C6
C10
C14
SIGNAL
GZG
BGA
BALL #
A5
A13
A20
B3
B7
B12
B16
B20
C3
C7
C11
C15
SIGNAL
DVDD4
DVDD4
DVDD1
VSS
SDRAM.D[13]
SDRAM.D[4]
CVDD3
LCD.P[11]
LCD.P[1]
SDRAM.D[14]
SDRAM.D[2]
SDRAM.A[7]
SDRAM.RAS
CVDD
LCD.P[13]
VSS
VSS
SDRAM.D[0]
SDRAM.A[0]
VSS
FLASH.A[3]
SDRAM.D[11]
SDRAM.CLK
SDRAM.A[4]
CVDD1
VSS
DVDD1
VSS
SDRAM.D[8]
DVDD4
LCD.AC
LCD.P[6]
DVDD5
SDRAM.D[9]
SDRAM.BA[0]
SDRAM.A[1]
DVDD4
VSS
LCD.P[5]
SDRAM.DQML
VSS
DVDD4
VSS
CVDD3
SDRAM.WE
SDRAM.D[6]
SDRAM.A[10]
LCD.PCLK
MicroStar BGA is a trademark of Texas Instruments.
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