參數(shù)資料
型號： OMAP5910(RISC)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 106/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(RISC)
Functional Overview
94
August 2002 Revised August 2003
SPRS197B
3.16.4
MPU/DSP Shared Peripheral Register Descriptions
The following tables describe the MPU/DSP shared peripheral registers including register addresses,
descriptions, required access widths, access types (R-read, W-write, RW-read/write) and reset values. These
tables are organized by function with like peripherals or functions together and are therefore not necessarily
in order of ascending register addresses. Reserved addresses should never be accessed.
NOTE:
All accesses to these registers must be of the data access widths indicated to avoid
a TIPB bus error condition and a corresponding interrupt. Reserved addresses should never
be accessed.
The MPU/DSP shared peripheral registers include the following:
UARTs:
UART1 Registers
UART2 Registers
UART3/IrDA Registers
GPIO and Mailboxes
MPU/DSP Shared GPIO Registers
MPU/DSP Shared Mailbox Registers
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參數(shù)描述
OMAP5912 制造商:TI 制造商全稱:Texas Instruments 功能描述:Applications Processor
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