參數(shù)資料
型號： MC145574
廠商： Motorola, Inc.
英文描述： ISDN S/T-Interface Transceiver
中文描述： 綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù)： 86/164頁
文件大?。?/td> 1072K
代理商： MC145574
MC145574
9–10
MOTOROLA
are reset to 0 by application of either a software or hardware reset. Note that BR10(7) is the MSB
of SC4 and BR10(4) is the LSB. Refer to Section 10 multiframing for a detailed description of the
multiframing procedure.
TE: SC4 from Loop
— BR10(7:4) are used in the multiframing mode of operation. When the device
is configured as a TE and multiframing has been enabled, these bits correspond to the received sub-
channel 4 nibble from the NT. These bits are updated once every multiframe. BR10(7:4) are read
only bits and are reset to 0 by either a software or hardware reset. Note that BR10(7) is the MSB
of SC4 and BR10(4) is the LSB. Refer to Section 10 for a detailed description of multiframe procedures.
BR10(3:0)
NT: SC5 to Loop
— BR10(3:0) are used for multiframing. In the NT mode of operation, these four
bits correspond to subchannel 5 for transmission to the TE(s). When multiframing is enabled, the NT
will transmit the bits in BR10(3:0) as subchannel 5, in accordance with CCITT I.430, ETSI ETS 300012,
and ANSI T1.605. BR10(3:0) is internally polled at the start of every multiframe (this occurs every
5 ms and the device can be programmed via NR4(2) to give an interrupt at the start of every multiframe),
and the contents are interpreted as subchannel 5. If multiframing is enabled and the contents of
BR10(3:0) have not been updated, the subchannel is re–transmitted as is. BR10(3:0) can be updated
any time between the 5 ms interrupts. In the NT mode of operation, BR10(3:0) are write only bits.
These bits are reset to 0 by application of either a software or hardware reset. Note that BR10(3)
is the MSB of SC5 and BR10(0) is the LSB. Refer to Section 10 for a detailed description of the multi-
frame procedure.
TE: SC5 from Loop
— BR10(3:0) are used in the multiframing mode of operation. When the device
is configured as a TE and multiframing has been enabled, these bits correspond to the received sub-
channel 5 nibble from the NT. These bits are updated once very multiframe. BR10(3:0) are read only
bits and are reset to 0 by either a software or hardware reset. Note that BR10(3) is the MSB of SC5
and BR10(0) is the LSB. Refer to Section 10 for a detailed description of the multiframe procedure.
(7)
(6)
(5)
(4)
(3)
(2)
(1)
(0)
BR11
NT: Do Not
React To
INFO 1
TE: Not
Applicable
NT: Do Not
React To
INFO 3
TE: Not
Applicable
Rx INFO
State B1
Rx INFO
State B0
Tx INFO
State B1
Tx INFO
State B0
External
S/T
Loopback
Transmit
96 kHz
Test Signal
9.13.1 BR11(7) — NT: Do Not React to INFO 1
TE: Not Applicable
This bit is only applicable to the NT mode of operation. When this bit is 0, the part functions normally.
When this bit is 1, the NT will not react to INFO 1 from the TE. (Note, however, that the NT will give
an interrupt indicating a change in received information state.) Only when the NT resets this bit to
0 will it react to INFO 1. This feature is used in the NT in applications where it is necessary to delay
activation of the S/T loop until the U link has reached its active state. This bit is a read/write bit and
is reset to 0 by application of either a hardware or software reset.
BR11(6) — NT: Do Not React to INFO 3
TE: Not Applicable
This bit is only applicable to the NT mode of operation. When this bit is 0, the part functions normally.
When this bit is 1, the NT will not react to INFO 3 from the TE (this INFO 3 from the TE being the
response of the TE to INFO 2 from the NT). Only when the NT resets this bit to 0 will it react to INFO
3. In the meantime, the NT will continue to transmit INFO 2. This feature is used in the NT in applications
where it is necessary to delay activation of the S/T loop until the U link has reached its active state.
This bit is a read/write bit and is reset to 0 by application of either a hardware or software reset.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
MC14559BDWR2 Successive Approximation Registers
MC14559B Successive Approximation Registers
MC14559BCP Successive Approximation Registers
MC1455 Timing Circuit
MC1455BD Timing Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC145574AAC 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AACR2 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574ADW 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574ADWR2 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AEG 制造商:Freescale Semiconductor 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*