- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382298 > MC145574 (Motorola, Inc.) ISDN S/T-Interface Transceiver PDF資料下載
參數(shù)資料
| 型號： | MC145574 |
| 廠商： | Motorola, Inc. |
| 英文描述： | ISDN S/T-Interface Transceiver |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口收發(fā)器 |
| 文件頁數(shù)： | 100/164頁 |
| 文件大?。?/td> | 1072K |
| 代理商： | MC145574 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁當(dāng)前第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁
MC145574
11–2
MOTOROLA
!! " "
"
The pins DREQUEST and DGRANT are used in the TE mode of operation to request and grant access
to the D channel. An external device wishing to send a layer 2 frame should bring DREQUEST high,
and maintain it high for the duration of the layer 2 frame. DGRANT is an output signal used to indicate
to an external device that the D channel is clear. Note that the DGRANT signal actually goes high
one received E echo bit prior to the programmed priority class selection. DGRANT goes high at a
count of (n – 1) to accommodate the delay between the input of D channel data via the IDL2 interface
and the line transmission of those bits towards the NT. If at the time of the IDL2 SYNC pulse falling
edge, the DGRANT and the DREQUEST signals are both detected high, the TE mode transceiver
will begin FIFO buffering of the input D channel bits from the IDL2 interface. This FIFO is four bits
deep. Note that DGRANT goes high on the boundaries of the demodulated E bits. In order for the
contention algorithm to work on the D channel, HDLC data must be used. The MC145574 modulates
the D channel data onto the S/T bus in the form that it is received from the IDL2 bus. Thus, the data
must be presented to it in HDLC format. Note that one of the applications of the MC145488 DDLC
is for use with the MC145574 in the terminal mode. The MC145488 performs the HDLC conversion
and D channel handshaking.
"" " !!
"
Recommendation CCITT I.430, ETSI ETS 300012, and ANSI T1.605 specifications mandate two
classes of operation for a TE, with respect to D channel operation. These two classes of operation
are class 1 and class 2. Each of these classes has two associated priorities; high priority and low
priority. These classes and their associated priorities pertain to the number of demodulated E bits
required to be 1, before the D channel is deemed to be clear for use. Using the MC145574 in the
TE mode of operation, the user programs the device for class 1 or class 2 operation by either NR2(0)
or Pin 10.
Table 11–3 illustrates how to configure the MC145574 for either class 1 or class 2 operation. This
table also illustrates when DGRANT will go high. Note that although DGRANT goes high one E bit
before the required count, data will not be modulated onto the D bit timeslots in the S/T frame until
the required number of E bits = 1 are received. Thus, data gets modulated onto the D channel if the
E bit following the low–to–high transition of DGRANT is 1.
Table 11–3. MC145574 Class Operations
MC145574
Number of E Bits = 1
Required for DGRANT to Go High
Class 1
NR2(0) = 0
and
Pin 10 = 0
DGRANT goes high after seven E bits = 1 in high
priority, and after eight in low priority
Class 2
NR2(0) = 1
or
Pin 10 = 1
DGRANT goes high after nine E bits = 1
in high priority, and after ten in low priority
The device automatically switches from high to low priority and back, within each class of operation,
in accordance with CCITT I.430, ETSI ETS 300012, and ANSI T1.605.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC14559BDWR2 | Successive Approximation Registers |
| MC14559B | Successive Approximation Registers |
| MC14559BCP | Successive Approximation Registers |
| MC1455 | Timing Circuit |
| MC1455BD | Timing Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC145574AAC | 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145574AACR2 | 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145574ADW | 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145574ADWR2 | 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145574AEG | 制造商:Freescale Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。