參數(shù)資料
型號: MC145574
廠商: Motorola, Inc.
英文描述: ISDN S/T-Interface Transceiver
中文描述: 綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù): 69/164頁
文件大?。?/td> 1072K
代理商: MC145574
MC145574
8–1
MOTOROLA
There are seven nibble registers (NR0 through NR6) in the MC145574. Control and status information
reside in these nibble registers, which are accessed via the SCP. For a detailed description of access
procedures, refer to Section 5. The nomenclature used in this data sheet is such that NR2(3) refers
to nibble register 2, bit 3.
The MC145574 nibble register map is compatible to the MC145474/475 nibble register map, the only
modification being the removal of bits NR6(2) and NR6(1), related to the IDL A/M FIFOs and the addi-
tion of bits (NR2(0), NR3(0), and NR4(0) for NT mode only).
Table 8–1. SCP Nibble Register Map for NT Operation
(3)
(2)
(1)
(0)
NR0
Software Reset
Transmit Power Down
Absolute Minimum Power
Return to Normal
NR1
Activation Indication
Error Indication
Not Applicable
Frame Sync
NR2
Activation Request
Deactivation Request
Activation Timer T1
Expired
NT Terminal Class
NR3
Change in Rx Info
State IRQ3
Multiframe Reception
IRQ2
IRQ6 FECV Detection
D Channel Collision IRQ7
NT Terminal Mode
NR4
Enable IRQ3
Enable IRQ2
Enable IRQ6
Enable IRQ7
NR5
Idle B1 Channel
Idle B2 Channel
Invert B1 Channel
Invert B2 Channel
NR6
2B+D IDL2 Loopback
Swap B1 and B2
Table 8–2. SCP Nibble Register Map for TE Operation
(3)
(2)
(1)
(0)
NR0
Software Reset
Transmit Power–Down
Absolute Minimum Power
Return to Normal
NR1
Activation Indication
Error Indication
Multiframing Detection
Frame Sync
NR2
Activation Request
Not Applicable
Activation Timer T3
Expired
Class
NR3
Change in Rx Info
State IRQ3
Multiframe Reception
IRQ2
D Channel Collision IRQ1
Not Applicable
NR4
Enable IRQ3
Enable IRQ2
Enable IRQ1
Not Applicable
NR5
Enable B1 Channel
Enable B2 Channel
Invert B1 Channel
Invert B2 Channel
NR6
2B+D IDL2 Loopback
Swap B1 and B2
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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