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參數(shù)資料
| 型號(hào)： | M37640E8 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER |
| 中文描述： | 單芯片8位CMOS單片機(jī) |
| 文件頁(yè)數(shù)： | 97/172頁(yè) |
| 文件大?。?/td> | 1193K |
| 代理商： | M37640E8 |
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7600 Series
Mitsubishi Microcomputer
M37640E8-XXXF Preliminary Specification
Timers
7/9/98
2-85
Figure 2-105. TYM Register
2.13.2.1
Read and Write Method
Read and write operations on the high and low-order bytes of Timer Y must be performed in a specific order.
Write Method
When writing to the timer, the lower order byte is written first. This data is placed in a temporary register
that is assigned the same address as Timer YL. Next, the high-order byte is written. Then, the data is placed
in the Timer YH reload latch and the low-order byte is transferred from its temporary register to the Timer
YL reload latch. At this point, if the Timer Y Data Write Control Bit (TYM0) (bit 0) is low, the value in the
Timer Y reload latch is also loaded in Timer Y. If TYM0 is “1”, the data in the Timer Y reload latch is
loaded in Timer Y after Timer Y underflows.
Read Method
When reading Timer Y, the high-order byte is read first. Reading the high-order byte causes the values of
Timer YH and Timer YL to be placed in temporary registers that are assigned the same addresses as Timer
YH and Timer YL. The low-order byte of Timer Y is then read from its temporary register. This operation
assures the correct reading of Timer Y while it is counting.
2.13.2.2
Count Stop Control
If the Timer Y Count Stop Bit (TYM7) (bit 7) is set to a “1”, Timer Y stops counting in all four modes.
2.13.2.3
Timer Mode
Count Source:
Φ
/
n
(where
n
is 8, 16, 32, or 64)
In this mode, each time the timer underflows, the corresponding timer interrupt request bit is set to a “1”,
the contents of the timer latch are loaded into the timer, and the count down sequence begins again.
In Timer mode, the signal TYOUT can also be brought out on the CNTR1 pin. This is controlled by TYM1 (bit1).
MSB
7
LSB
0
TYM7
TYM6
TYM5
TYM4
TYM3
TYM2
TYM1
TYM0
TYM0
Timer Y Data Write Control Bit (bit 0)
0: Write data in latch and timer
1: Write data in latch only
Timer Y Output Control Bit (bit 1)
0: TYOUT output disable
1: TYOUT output enable
Timer Y Frequency Division Ratio Bits (bit 3,2)
Bit 2
Bit 1
0
0:
0
1:
1
0:
1
1:
Timer Y Mode Bits (bits 5,4)
Bit 2
Bit 1
0
0:
0
1:
1
0:
1
1:
TYM1
TYM3,2
Φ
divided by 8
Φ
divided by 16
Φ
divided by 32
Φ
divided by 64
TYM5,4
Timer mode
Pulse period measurement mode
Event counter mode
HL pulse width measurement mode (continuously measures
high period and low period)
CNTR1 Polarity Select Bit (bit 6)
0: For event counter mode, clocked by rising edge
For pulse period measurement mode, falling edge detection
For CNTR1 interrupt request, falling edge active
For TYOUT, start on high output
1: For event counter mode, clocked on falling edge
For pulse period measurement mode, rising edge detection
For CNTR1 interrupt request, rising edge active
For TYOUT, start on low output
Timer Y Stop Bit (bit 7)
0: Count start
1: Count stop
TYM6
TYM7
Access: R/W
Reset: 00
16
Address: 0028
16
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參數(shù)描述 |
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| M37640E8FP | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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