參數(shù)資料
型號(hào): L84302
元件分類: 通用總線功能
英文描述: L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02
中文描述: L84302四100/10 Mbps的4端口以太網(wǎng)的遠(yuǎn)程監(jiān)控控制器/ SNMP管理處的技術(shù)手冊(cè),4月2日
文件頁(yè)數(shù): 119/128頁(yè)
文件大?。?/td> 997K
代理商: L84302
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Revision History
Copyright 1997-2002 by LSI Logic Corporation. All rights reserved.
119 of 128
April, 2002
Paragraph #1, has a copy change.
page 54
:
Figure 7
. Autonegotiated Pause Frame Format
MAC, SA, and PARAM sections have been changed.
page 61
: Counter Definition
Counter Name aFramesReceivedOK Description has been changed,
and Register Address has been changed.
page 64
: Notes
Note #1 has been changed.
page 76
:
Table 21
. FIFO Threshold Register Definition
Bit #s 7, 6, 5, 4, Definition has been changed.
Bit #s 3, 2, 1, 0, Definition has been changed.
page 78
:
Table 23
. Configuration 2 Register Definition
Bit #1 TXSTS_UPD has been changed to TXOFF.
Bit #1, Row has been changed.
page 89
:
Table 35
. TX Status Register Definition
Note has been changed.
page 107
, Table System Interface Timing Characteristics, RXDC/TXRET
Operation
SYM, t
66
conditions is now CLRTXERR.
page 113
: Table, Management Interface (MI) Timing Characteristics
SYM t
113
, (MAX) has been changed from 100 to 50
SYM t
114
, (MIN) has been changed from 10 to 20
SYM t
115
, (MIN) has been changed from 10 to 0 and (MAX) has
been changed from 50 and is now blank.
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