參數資料
型號: CTMRM
英文描述: Configurable Timer Module Reference Manual
中文描述: 配置定時器模塊參考手冊
文件頁數: 92/164頁
文件大小: 1148K
代理商: CTMRM
MOTOROLA
8-22
CTM
REFERENCE
DOUBLE ACTION SUBMODULE (DASM)
For More Information On This Product,
Go to: www.freescale.com
8
8.7.3
OCB mode example
****************************************************************************
*
*
DASM_OCB (for CPU16 based devices)
*
*
Demonstration of the DASM CTM sub-module operating in OCB mode.
*
Direct read of time-base and FLAG polling also used.
*
*
pin A B A B..
*
forced ________________ ________________
*
low | | | |
*
xxxxx | | | |
*
|___________| |__________| |_..
*
+----------> $200 +----------> $200
*
$100* +----------------> $100 +---------------->
*
*
The pin is initially forced low by selecting OCB mode with the EDPOL
*
clear. The current timebase value is then read from BIUTBR. The rising
*
edge (A) is scheduled $100 counts from this value, and the falling
*
edge is scheduled $200 counts after the rising edge.
*
The pulse train is maintained continuously by polling the DASM FLAG
*
bit. When it has been by a B compare another two compares are
*
scheduled.
*
*
* The time between forcing the pin low and the first rising edge is
*
slightly less than $100 counts. This is because of the software delay
*
between forcing the the pin low (by selecting OCB mode in DASMSIC) and
*
reading BIUTBR.
*
*
Timings assume 16.777MHz system clock
*
****************************************************************************
* Set up the bus interface unit sub-module, BIUSM
ldd
#$0C01
std
BIUMCR
; CTM not stopped, ignore FREEZE,
; vector base =$4x, IARB2-0=4, BUS B displayed
* Set up the counter prescaler module, CPSM
ldd
#$0008
std
CPCR
; Set PRUN to start prescaler and set
; PCLK dividers to /2 /4 /8 /16 /32 and /64
* Set up the free running counter module, FCSM
ldd
#$0905
std
fcsm25sic
; No interrupts, arb3=1, timebase B driven
; Clock using PCLK6 (/64 clock, 3.8147
μ
s)
* DASM OCB mode initialization
ldd
std
#$0900
dasm10sic
; MODE = %0000 = DIS
; Disable DASM module before re-configuring
ldd
#$0904
; MODE = %0100
; EDPOL = 0
; FORCA,B = 0
; BSL = 1
; WOR = 0
; IARB3 = 1
; IL = %000
Select OCB mode
Generate positive pulse
Don't force pin now
Use time base bus B
Totem pole output
Interrupts disabled
std
bset
dasm10sic
BIUMCR+1,#1
; Allow timebase bus 2 to be read
F
.
Freescale Semiconductor, Inc.
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