- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366938 > CTMRM Configurable Timer Module Reference Manual PDF資料下載
參數(shù)資料
| 型號(hào)： | CTMRM |
| 英文描述： | Configurable Timer Module Reference Manual |
| 中文描述： | 配置定時(shí)器模塊參考手冊 |
| 文件頁數(shù)： | 38/164頁 |
| 文件大?。?/td> | 1148K |
| 代理商： | CTMRM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當(dāng)前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁
MOTOROLA
3-2
CTM
REFERENCE
INTERRUPTS
3
3.2
Arbitration
The interrupt and exception processing system on IMB family devices is very similar to that used
in the M68000 microprocessor family architecture, and is designed to support a very large number
of interrupt sources. Within each of the eight interrupt request levels, defined by IL[2:0], there are
sixteen different arbitration priority levels, defined by IARB[3:0], available to each IMB module.
Level 15 is the highest arbitration priority level and level 1 is the lowest. Level 0 is a special case
and is treated by the CPU as a spurious interrupt. Interrupting modules present their arbitration ID
(IARB[3:0]) on the IMB and the module with the highest ID wins.
Note:
Simultaneous interrupts on the same interrupt level are arbitrated on the basis of the
four arbitration bits IARB[3:0]. Consequently, no two IMB modules may have the same
IARB field value.
In the CTM, IARB[2:0] are contained within the BIUSM module configuration register (BIUMCR)
and are common to all the CTM submodules, and each CTM submodule contains its own IL[2:0]
and IARB3 bits. This allows each CTM submodule to request interrupts with one of two arbitration
levels on any one of the 8 available interrupt levels. For example, if the IARB[2:0] bits in the
BIUMCR are set to 101, each submodule can have an arbitration priority level of 0101 (5) or 1101
(13), depending on the state of the IARB3 bit.
3.3
CTM daisy-chain priority
To allow resolution between CTM submodule interrupts on the same interrupt level (IL[2:0]) and
with the same arbitration priority (IARB3), the six hardwired vector bits (VECT[5:0]) in each
submodule provide a hardware system of priority, or daisy-chain, within the CTM. The submodules
are daisy-chained in descending order of their vector numbers, i.e. submodule 0 has the highest
position in the daisy-chain and will win over all other submodules generating simultaneous
interrupts on the same level with the same arbitration. The position of each submodule in the
daisy-chain is specific to each different CTM variant. This is shown generically in Table 3-1. For an
example of the daisy-chain structure of a specific CTM implementation, CTM2, see Appendix B.
F
.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CTN368 | TRANSISTOR | BJT | NPN | 20V V(BR)CEO | 1A I(C) | TO-237AA |
| CTN369 | TRANSISTOR | BJT | PNP | 20V V(BR)CEO | 500MA I(C) | TO-237 |
| CTO1065 | Analog IC |
| CTS0003IB | Analog IC |
| CTS0024GB | Voltage-Feedback Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CTMT001A | 制造商:Richco 功能描述:CABLE TIE SCREW MOUNT:NYL NATURA |
| CTMT002A | 制造商:Richco 功能描述:CABLE TIE SCREW MOUNT:NYL NATURA |
| CTMT003A | 制造商:Richco 功能描述:CABLE TIE SCREW MOUNT:NYL NATURA |
| CTMT004A | 制造商:Richco 功能描述:CABLE TIE SCREW MOUNT:NYL NATURA |
| CT-MVS.12P | 制造商:ABB Control 功能描述:Multi-function Timer 1C/O |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。