
CTM
REFERENCE
MOTOROLA
8-17
DOUBLE ACTION SUBMODULE (DASM)
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8
1 (set)
–
Channel A captures on a falling edge.
0 (clear) –
Channel A captures on a rising edge.
In the OCB, OCAB and OPWM modes, the EDPOL bit is used to select the voltage level on the
output pin.
1 (set)
–
The complement of the output flip-flop logic level appears on the
output pin: a compare on channel A resets the output pin; a compare
on channel B sets the output pin.
0 (clear) –
The output flip-flop logic level appears on the output pin: a compare
on channel A sets the output pin, a compare on channel B resets the
output pin.
The EDPOL bit is cleared by reset.
MODE[3:0] — Mode select bits
The four mode select bits select the mode of operation of the DASM. To avoid spurious interrupts,
it is recommended that DASM interrupts are disabled before changing the operating mode.
The mode select bits are cleared by reset.
DASMcontrol register bits
MOD3 MOD2 MOD1 MOD0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
Bits of
resolution
—
16
16
16
16
16
—
—
16
15
14
13
12
11
9
7
Time base
bits ignored
—
—
—
—
—
—
—
—
—
15
15, 14
15-13
15-12
15-11
15-9
15-7
DASMmode of operation
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DIS – Disabled
IPWM– Input pulse width measurement
IPM– Input period measurement
IC – Input capture
OCB – Output compare, flag on B compare
OCAB – Output compare, flag on A and B compare
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
OPWM– Output pulse width modulation
F
.
Freescale Semiconductor, Inc.