
CTM
REFERENCE
MOTOROLA
6-3
MODULUS COUNTER SUBMODULE (MCSM)
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6
Loading of the counter register from the modulus register can also be triggered an external event
on the modulus load pin CTML. The edge on the CTML pin that triggers the loading of the counter
register is selected by bits EDGEN and EDGEP in the MCSMSIC register. Hardware is provided
to prevent the occurrence of spurious edges while changing the EDGEN and EDGEP bits. Reset
clears the EDGEN and EDGEP bits to zero, thereby preventing a signal on the CTML pin from
loading the counter register until EDGEN and EDGEP have been initialized by the software. The
modulus load input pin CTML is Schmitt triggered and synchronized to the system clock (f
SYS
).
Note:
The read-only IN1 bit of the MCSMSIC reflects the state of the input pin CTML.
6.3.1.1
Using the MCSM as a free-running counter
The MCSM is a modulus counter. However it can be made to behave like a free-running counter
by loading the modulus register with the value $0000.
6.4
MCSM clock sources
The User can choose from eight software selectable counter clock sources:
–
–
–
six prescaler outputs (PCLKx)
input pin rising edge detection on the input pin CTMC
input pin falling edge detection on the input pin CTMC
The clock source is selected by the CLK[2:0] bits in the MCSM status, interrupt and control register
MCSMSIC (see Section 6.8.1). When the CLK[2:0] bits are being changed, internal circuitry
ensures that spurious edges occurring on the CTMC pin do not affect the MCSM. The clock input
pin CTMC is Schmitt triggered and is synchronized with the system clock (f
SYS
).
Note:
The read-only IN2 bit of the MCSMSIC register reflects the state of the input pin CTMC.
6.4.1
MCSM external event counting
When an external clock source (on the CTMC input pin) is selected, the MCSM is in the event
counter mode. The counter can simply count the number of events occurring on the input pin.
Alternatively, the MCSM can be programmed to generate an interrupt when a predefined number
of events have been counted; this is done by presetting the counter with the two’s complement
value of the desired number of events. When using the external clock source, the maximum
external guaranteed frequency is f
SYS
/4.
F
.
Freescale Semiconductor, Inc.