參數(shù)資料
型號： CTMRM
英文描述： Configurable Timer Module Reference Manual
中文描述： 配置定時器模塊參考手冊
文件頁數(shù)： 72/164頁
文件大?。?/td> 1148K
代理商： CTMRM
MOTOROLA
8-2
CTM
REFERENCE
DOUBLE ACTION SUBMODULE (DASM)
For More Information On This Product,
Go to: www.freescale.com
8
8.1
DASM description
The DASM is a timer submodule designed specifically to be integrated into CTM systems used in
Motorola’s M68300 and M68HC16 family MCUs. It contains two timing channels A and B
associated with the same input/output pin. The dual action submodule is so called because its
timing channel configuration allows two events (input capture or output compare) to occur before
some software intervention is required.
Six operating modes allow the software to use the DASM’s input capture and output compare
functions to perform pulse width measurement, period measurement, single pulse generation and
continuous pulse width generation, as well as standard input capture and output compare. The
DASM can also work as a single I/O pin (see Table 8-1).
The DASM is composed of two timing channels (A and B), an output flip-flop, an input edge
detector, some control logic and an interrupt section (see Figure 8-1). All control and status bits
are contained in the DASMSIC register.
Channel A comprises one 16-bit data register and one 16-bit comparator. Channel B also appears
to the user to consist of one 16-bit data register and one 16-bit comparator, however, internally,
channel B has two data registers B1 and B2, and the operating mode determines which register
is accessed by the software:
–
In the input capture modes (IPWM, IPM and IC), registers A and B2 are used
to hold the captured values; in these modes, the B1 register is used as a
temporary latch for channel B.
In the output compare modes (OCA and OCAB), registers A and B2 are
used to define the output pulse; register B1 is not used in these modes.
In the output pulse width modulation mode (OPWM), registers A and B1 are
used as primary registers and hidden register B2 is used as a double buffer
for channel B.
–
–
Register contents are always transferred automatically at the correct time so that the minimum
pulse (measurement or generation) is just one time base bus count. The A and B data registers
are always read/write registers, accessible via the CTM’s submodule bus.
In the input capture modes, the edge detect circuitry triggers a capture whenever a rising or falling
edge (as defined by the EDPOL bit) is applied to the input pin. The signal on the input pin is Schmitt
triggered and synchronized with the system clock (f
SYS
).
In the disabled mode (DIS) and in the input modes, the IN bit reflects the state present on the input
pin (after being Schmitt triggered and synchronized). In the output modes the IN bit reflects the
value present at the output of the output flip-flop.
The output flip-flop is used in output modes to hold the logic level applied to the output pin.
The time base bus selector is common to all input and output functions; it connects the DASM to
time base bus A or B and is controlled in software by the bus select bit BSL in the DASMSIC
register.
F
.
Freescale Semiconductor, Inc.
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