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| 型號(hào)： | CTMRM |
| 英文描述： | Configurable Timer Module Reference Manual |
| 中文描述： | 配置定時(shí)器模塊參考手冊(cè) |
| 文件頁(yè)數(shù)： | 103/164頁(yè) |
| 文件大?。?/td> | 1148K |
| 代理商： | CTMRM |
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CTM
REFERENCE
MOTOROLA
9-9
PULSE WIDTH MODULATION SUBMODULE
For More Information On This Product,
Go to: www.freescale.com
9
9.4
PWMSM register map and registers
The PWMSM register map comprises four 16-bit registers as shown in Table 9-3. All unused bits
and reserved address locations return zero when read by the software. Writing to unused bits and
reserved address locations has no meaning nor effect. All register addresses in this section are
specified as offsets from the base address of the PWMSM.
9.4.1
PWMSIC — Status, interrupt and control register
The PWMSIC register contains status, interrupt enable and control bits for the PWMSM. It also
contains interrupt level and arbitration bits.
FLAG — Period completion status bit
The FLAG bit is a status bit that indicates when the PWM output period has been completed.
1 (set)
–
PWM period completed.
0 (clear) –
PWM period not completed.
The FLAG bit is set by the hardware each time a PWM period is completed. Whenever the PWM
is enabled, the FLAG bit is set immediately to indicate that the contents of the buffer registers
PWMA2 and PWMB2 have been updated, and that the period using these new values has started.
It also indicates that the user accessible period and pulse width registers PWMA1 and PWMB1
can be loaded with values for the next PWM period. Once set, the FLAG bit will remain set and will
not be affected by any subsequent period completions, until it is cleared by the software.
(1) Offset fromthe base address of the PWMSMsubmodule.
(1) Offset fromthe base address of the PWMSMsubmodule.
Table 9-3
PWMSM register map
Address
$00
$02
$04
$06
(1)
15
8 7
0
Status, interrupt and control register (PWMSIC)
PWMperiod register(PWMA)
PWMpulse width register (PWMB)
PWMcounter register (PWMC)
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PWMSIC
$00
(1)
FLAG
IL2
IL1
IL0
IARB3
PIN
LOAD
POL
EN
CLK2
CLK1
CLK0
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
.
Freescale Semiconductor, Inc.
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