參數(shù)資料
型號： CTMRM
英文描述： Configurable Timer Module Reference Manual
中文描述： 配置定時器模塊參考手冊
文件頁數(shù)： 156/164頁
文件大?。?/td> 1148K
代理商： CTMRM
MOTOROLA
iv
CTM
REFERENCE
INDEX
D
MCSMCNT — MCSM counter register
6-7
MCSMML — MCSM modulus latch register
6-8
MCSMSIC — MCSM status/interrupt/control register
6-5
minimum pulse width
DASM
8-2
PWMSM
9-1
,
9-2
,
9-7
misaligned access
1-3
–
1-5
MODE[3:0] - bits in DASMSIC
8-17
MODE1, MODE0 - bit in SICA
7-10
modes of operation
DASM
8-3
DASM disable mode
8-4
DASM period measurement mode
8-5
DASM pulse width measurement mode
8-4
event counting mode
1-8
5-2
6-3
gated mode
1-8
input capture
7-4
,
8-7
output compare
7-4
8-7
output compare and toggle
7-5
output port
7-5
pulse accumulator concepts
1-8
pulse width modulation
8-10
STOP mode
2-1
test mode
2-5
modulus counter submodule - MCSM
modulus latch
6-2
multiple DASMs
8-13
multiple FCSMs
5-4
multiple SASMs
7-6
O
open-drain
8-8
,
8-12
,
8-15
output compare
concepts
1-7
example using DASM
8-22
pulse and signal generation
1-7
SASM
7-1
SASM OC mode
7-4
toggling the state on a pin
1-8
output compare and toggle
SASM OCT mode
7-5
output flip-flop
effect of reset
7-2
,
8-8
,
9-4
output latch
PWM
1-9
output pins
DASM
8-2
PWMSM
9-2
SASM
7-1
outputs
SASM OP mode
7-5
P
period and pulse width measurement
1-6
period measurement
example using DASM IPM mode
8-21
period register values
PWMSM
9-8
PIN - bit in PWMSIC
9-10
pin allocation
CTM2
B-3
pipelining
1-3
,
1-5
POL - bit in PWMSIC
9-11
prescaler, switching on and off.
4-2
PRUN - bit in CPCR
4-2
PSEL1, PSEL0 - bits in CPCR
4-3
pulse accumulator
concepts
1-8
counter overflow
1-8
event counting mode
1-8
gated mode
1-8
modes of operation
1-8
pulse and signal generation
1-7
pulse width modulation
example using DASM
8-24
pulse width modulation (PWM)
concepts
1-9
waveforms
1-9
pulse width modulation submodule - see PWMSM
PWM duty cycle
1-9
PWMA — PWM period register
9-12
PWMB — PWM pulse width register
9-13
PWMC — PWM counter register
9-14
PWMSIC — Status, interrupt and control register
9-9
PWMSM
block diagram
9-3
clock rate selection
9-13
clock selection
9-2
coherency
9-5
comparators
9-4
counter
9-3
effect of reset on counter
9-3
effect of reset on output flip-flop
9-4
enabling and disabling the PWMSM
9-12
features
9-1
freeze
9-6
frequency
9-6
,
9-7
interrupts
9-6
maximum duty cycle
9-5
maximum output frequency
9-1
minimum pulse width
9-1
,
9-2
,
9-7
output flip-flop
9-2
,
9-5
output pin
9-2
output pulse width
9-5
period registers
9-4
pulse width
9-6
,
9-7
pulse width register values
9-8
pulse width registers
9-4
PWMA — PWM period register
9-12
PWMB — PWM pulse width register
9-13
PWMC — PWM counter register
9-14
PWMSIC — Status, interrupt and control register
9-9
register map
9-9
reinitialization
9-11
F
.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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