CPU16
REFERENCE MANUAL
INSTRUCTION SET
MOTOROLA
5-15
address of the instruction plus $0006. At maximum positive offset
($7FFE), displacement from the instruction is 32772. At maximum
negative offset ($8000), displacement is –32762.
5.6.3 Bit Condition Branch Instructions
Bit condition branches are taken when specific bits in a memory byte are in a specific
state. A mask operand is used to test a memory location pointed to by a 20-bit indexed
or extended effective address. If the bits in memory match the mask, an 8- or 16-bit
signed relative offset is added to the current value of the program counter. If addition
causes the value in the PC to be greater than $FFFF or less than $0000, the PK ex-
tension field is incremented or decremented. Program execution continues at the new
extended address.
Note
The numeric range of 8-bit offset values is $80 (–128) to $7F (127),
and the numeric range of 16-bit offset values is $8000 (–32768) to
$7FFF (32767), but actual displacement from the branch instruction
differs from the range, for two reasons.
First, PC values are automatically aligned to word boundaries. Only
even offsets are valid — an odd offset value is rounded down. Maxi-
mum positive 8-bit offset is $7E; maximum positive 16-bit offset is
$7FFE.
Second, instruction pipelining affects the value in the PC at the time
an instruction executes. The value to which the offset is added is the
address of the instruction plus $0006. Maximum positive ($7E) and
negative ($80) 8-bit offsets correspond to displacements of 132 and
Table 5-22 Bit Condition Branch Summary
Mnemonic
BRCLR
Addressing Mode
IND8, X
IND8, Y
IND8, Z
IND16, X
IND16, Y
IND16, Z
EXT
IND8, X
IND8, Y
IND8, Z
IND16, X
IND16, Y
IND16, Z
EXT
Opcode
CB
DB
EB
0A
1A
2A
3A
8B
9B
AB
0B
1B
2B
3B
Equation
(M)
(Mask) = 0
BRSET
(M)
(Mask) = 0
F
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