MOTOROLA
5-8
INSTRUCTION SET
CPU16
REFERENCE MANUAL
5.3.7 Boolean Logic Instructions
Each of these instructions performs the Boolean logic operation represented by the
mnemonic. There are 8- and 16-bit versions of each instruction.
There are special forms of logic instructions for stack pointer, program counter, index
register, and address extension field manipulation. Refer to the appropriate summary
for more information.
5.4 Bit Test and Manipulation Instructions
These operations use a mask value to test or change the value of individual bits in an
accumulator or in memory. BITA and BITB provide a convenient means of setting con-
dition codes without altering the value of either operand.
5.5 Shift and Rotate Instructions
There are shift and rotate commands for all accumulators, for memory bytes, and for
memory words. All shift and rotate operations pass the shifted-out bit through the carry
bit in the CCR in order to facilitate multiple-byte and multiple-word operations. There
are no separate logical left shift operations. Use arithmetic shift left (ASL) for logic shift
left (LSL) functions — LSL mnemonics will be assembled as ASL operations.
Table 5-15 Boolean Logic Summary
Mnemonic
ANDA
ANDB
ANDD
ANDE
EORA
EORB
EORD
EORE
ORAA
ORAB
ORD
ORE
Function
AND A
AND B
AND D
AND E
Exclusive OR A
Exclusive OR B
Exclusive OR D
Exclusive OR E
OR A
OR B
OR D
OR E
Operation
(A)
×
(M)
A
(B)
×
(M)
B
(D)
×
(M : M + 1)
D
(E)
×
(M : M + 1)
E
(A)
⊕
(M)
A
(B)
⊕
(M)
B
(D)
⊕
(M : M + 1)
D
(E)
⊕
(M : M + 1)
E
(A)
(M)
A
(B)
(M)
B
(D)
(M : M + 1)
D
(E)
(M : M + 1)
E
Table 5-16 Bit Test and Manipulation Summary
Mnemonic
BITA
BITB
BCLR
BCLRW
BSET
BSETW
Function
Bit Test A
Bit Test B
Clear Bit(s)
Clear Bit(s) Word
Set Bit(s)
Set Bit(s) Word
Operation
(A)
×
(M)
(B)
×
(M)
(M)
×
(Mask)
M
(M : M + 1)
×
(Mask)
M : M + 1
(M)
(Mask)
M
(M : M + 1)
(Mask)
M : M + 1
F
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