CPU16
REFERENCE MANUAL
DIGITAL SIGNAL PROCESSING
MOTOROLA
11-7
After TMXED is executed, transfer the content of IX to a RAM location, load data into
E : D, then shift and round appropriately.
11.7.2.4 LDED/STED — Long Word Load and Store Instructions
While LDED and STED are not specifically intended for DSP, they operate on the con-
catenated E and D accumulators, and are useful for handling DSP values. See listings
in
SECTION 6 INSTRUCTION GLOSSARY
.
11.7.3 Multiplication and Accumulation Instructions
These instructions are the heart of CPU16 digital signal processing capability. The
MAC and RMAC instructions provide flexible control-oriented processing with modulo
addressing, while the FMULS, ACE, and ACED instructions provide the ability to pres-
cale and add constants.
11.7.3.1 MAC — Multiply and Accumulate
MAC multiplies a 16-bit signed fractional multiplicand contained in IR by a 16-bit
signed fractional multiplier contained in HR. The product is left-shifted once to align
the radix point between bits 31 and 30, then placed in E : D[31:1]. D0 is cleared. The
aligned product is then added to the content of AM.
As the multiply and accumulate operation takes place, 4-bit X and Y offsets (xo, yo)
specified by an instruction operand are sign-extended to 16 bits and used with XMSK
and YMSK values to qualify the corresponding index registers. The following expres-
sions are used to qualify the index registers:
IX
=
((IX)
X MASK)
((IX)
+
xo)
X MASK)
IY
=
((IY)
Y MASK)
((IY)
+
yo)
Y MASK)
Writing a non-zero value into a mask register prior to MAC execution enables modulo
addressing. The TDMSK instruction writes mask values. When a mask contains $0,
the sign-extended offset is added to the content of the corresponding index register.
After accumulation, HR content is transferred to IZ, then a word at the address pointed
to by IX is loaded into HR, and a word at the address pointed to by IY is loaded into
IR. The fractional product remains in E : D.
When both registers contain $8000 (–1), a value of $80000000 (1.0 in 36-bit format)
is accumulated, (E
:
D) is $80000000 (–1.0 in 32-bit format), and the CCR V bit is set.
11.7.3.2 RMAC — Repeating Multiply and Accumulate
RMAC performs repeated multiplication of 16-bit signed fractional multiplicands con-
tained in IR by 16-bit signed fractional multipliers contained in HR. Accumulator D is
used for temporary storage during multiplication. Each product is added to the content
of the accumulator M. A 16-bit integer contained by accumulator E determines the
number of repetitions.
There are implied radix points between bits 15 and 14 of HR and IR. Each product is
left-shifted one place to align the radix point between bits 31 and 30 before addition to
AM.
F
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n
.