
MOTOROLA
I-2
CPU16
REFERENCE MANUAL
BRSET 6-67
BSET 5-8, 6-68
BSETW 5-8, 6-69
BSR 5-16, 6-70, 7-7, A-11
Bus cycle 8-1, 8-2
Bus cycles
Termination 3-10
Bus error 3-10
Bus fault 10-11
Double 10-11
Bus signals
Address bus 3-10
Data bus 3-10
Bus sizing
Dynamic 3-11, 8-1
BVC 6-71
BVS 6-72
–C–
CBA 5-6, 6-73
CCR 2-1, 2-2, 3-4, 5-2, 5-5, 11-5, A-2
Manipulation 5-2
CCR bits
C 2-2, 3-4
EV 2-2
H 2-2
IP 2-2, 3-4, 8-4
MV 2-2
N 2-2, 3-4
PK 2-2, 3-5
S 2-2, 3-4, 8-4
SM 2-2, 3-4
V 2-2, 3-4
Z 2-2, 3-4
Change of flow 7-6
CLC A-7
CLI A-8
CLR 5-7, 6-74
CLRA 5-7, 6-75
CLRB 5-7, 6-76
CLRD 5-7, 6-77
CLRE 5-7, 6-78
CLRM 6-79, 11-9
CLRW 5-7, 6-80
CLV A-8
CMPA 5-6, 6-81
CMPB 5-6, 6-82
COM 5-7, 6-83
COMA 5-7, 6-84
COMB 5-7, 6-85
COMD 5-7, 6-86
COME 5-7, 6-87
Comparison
M68HC11 vs CPU16 A-1
COMW 5-7, 6-88
Condition Code Register A-2
Connection
BDM 10-37
Control bit
Saturation mode 2-2
Stop disable 2-2
CPD 5-6, 6-89
CPE 5-6, 6-90
CPS 6-91
CPX 6-92
CPY 6-93
CPZ 6-94
Cycle time 8-5
–D–
DAA 5-5, 6-95, 6-96
Data
Types 4-1
Binary coded decimal 4-1
Negative 4-1
Signed 4-1
Data saturation 11-5
Data strobe 3-10
Data transfer 3-11
DATA[15:0] 3-10
Debug 10-8
DEC 5-7, 6-97
DECA 5-7, 6-98
DECB 5-7, 6-99
DECW 5-7, 6-100
DES A-8
Development 10-16
DEX A-8
DEY A-9
DSACK0 3-10
DSACK1 3-10
DSCLK 10-14
DSP 11-1
–E–
EBI 3-8
EDIV 5-6, 6-101, 9-15
EDIVS 5-6, 6-102, 9-15
EK 2-1
EMUL 5-6, 6-103
Emulation 10-9
EMULS 5-6, 6-104
EORA 5-8, 6-105
EORB 5-8, 6-106
EORD 5-8, 6-107
EORE 5-8, 6-108
EV 3-4
Exception
Asynchronous 9-9
Definition 9-1
External 9-2
Internal 9-2
Multiple 9-8
Processing 9-3, 10-4
Stack frame 9-2
Synchronous 9-14
Vector 9-1
F
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