
CPU16
REFERENCE MANUAL
MOTOROLA
I-5
–O–
Opcode
Deterministic 10-1
Tracking 10-1
Operands
Byte order 3-11
Multiplicand 11-2
Multiplier 11-2
ORAA 5-8, 6-166
ORAB 5-8, 6-167
ORD 5-8, 6-168
ORE 5-8, 6-169
ORP 5-21, 5-23, 6-170, 9-14
–P–
PC 2-1
Pipeline 7-3, 10-1, A-4
PK 2-1, 2-2, 3-7
Program counter 2-1
extension field 2-1
Program flow
Changes A-5
PSHA 6-171, A-12
PSHB 6-172, A-12
PSHM 3-6, 6-173
PSHMAC 6-174, 11-10
PSHX A-9
PSHY A-10
PULA 6-175, A-12
PULB 6-176, A-12
PULM 3-6, 6-177
PULMAC 6-178, 11-10
PULX A-10
PULY A-10
–R–
R/W 3-10
RDMAC 10-25, 10-26
RDMEM 10-20, 10-31
Register
Notation 2-1
Registers 11-5
Address extension 2-1, 3-5
Concatenated 3-3
Condition code 2-1, 3-4
Condition code bits 2-2
Index 2-1, 3-3
MAC 3-5
Model 3-1
Multiply and Accumulate 2-1, 3-5
Result
Carry flag 3-4
Negative 3-4
Overflow flag 3-4
Zero 3-4
RESET 9-2, 9-8, 9-9
RMAC 6-179, 6-180, 11-7
ROL 6-181
ROLA 6-182
ROLB 6-183
ROLD 6-184
ROLE 6-185
ROLW 6-186
ROR 6-187
RORA 6-188
RORB 6-189
RORD 6-190
RORE 6-191
RORW 6-192
Routine
Interrupt 7-7
RPCSP 10-29
RPMEM 10-19, 10-20, 10-33
RREGM 10-21, 10-22
RTI 5-17, 6-193, 7-7, 9-15, A-12
RTS 5-17, 6-194, 7-7, A-13
–S–
Saturate mode 3-4
SBA 5-4, 6-195
SBCA 5-4, 6-196
SBCB 5-4, 6-197
SBCD 5-4, 6-198
SBCE 5-4
SDE 5-4
SEC A-10
SEI A-11
SEV A-11
Sign
Bit overflow 11-4
SIZ0 3-9
SIZ1 3-9
Size acknowledge 3-11
SK 2-1
SL 2-1
SM 2-2
SP 2-1
SPI 10-13
STAA 5-2, 6-199
STAB 5-2, 6-200
Stack
Frame A-7
Implementation 3-3
Manipulation 8-4
Pointer 2-1
Pointer (SP) 3-3
START 10-3
State Signals 10-3
STD 5-2, 6-201
STE 5-2, 6-202
STED 5-2, 6-203, 8-8
STOP 3-4, A-11
Stop Enable 3-4
STS 6-204
STX 6-205
STY 6-206
F
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