
MOTOROLA
I-4
CPU16
REFERENCE MANUAL
Stack
Manipulation 8-4
Operations 5-20
Pointer 5-20
Stacking 11-10
Stop 5-22, 8-4
Store 5-2
Subroutine 5-16, 7-6, A-6
TDMSK 11-5
Test 5-5
Timing 8-1
TMER 11-6
TMET 11-6
TMXED 11-6
Transfer 5-2, 11-6
Unimplemented A-14
Unsigned 5-1
Wait 5-22, 8-4
Interrupt 9-13, A-6
Priority 2-2, 9-13, A-7
Field 3-4
Invalid
Signal 10-4
INX A-9
INY A-9
IP 2-2
IPIPE0 7-3, 10-1
IPIPE1 7-3, 10-1
IR 2-1, 11-1
IX 3-3
IY 3-3
IZ 3-3
–J–
JMP 5-16, 6-116
JSR 5-16, 6-117, 7-7, A-11
–K–
K 2-1
–L–
LBCC 6-118
LBCS 6-119
LBEQ 6-120
LBEV 6-121, 11-10
LBGE 6-122
LBGT 6-123
LBHI 6-124
LBLE 6-125
LBLS 6-126
LBLT 6-127
LBMI 6-128
LBMV 6-129, 11-10
LBNE 6-130
LBPL 6-131
LBRA 5-16, 6-132
LBRN 6-133
LBSR 5-16, 6-134, 7-7
LBVC 6-135
LBVS 6-136
LDAA 5-2, 6-137
LDAB 5-2, 6-138
LDD 5-2, 6-139, 8-6
LDE 5-2, 6-140
LDED 5-2, 6-141
LDHI 6-142, 11-5
LDS 6-143
LDX 6-144
LDY 6-145
LDZ 6-146
LPSTOP 5-22, 6-147, 8-4, A-11
LSL 5-8
LSR 6-148
LSRA 6-149
LSRB 6-150
LSRD 6-151
LSRE 6-152
LSRW 6-153
–M–
MAC 6-154, 6-155, 11-1, 11-4
Memory
Organization 4-2
Microsequencer 7-3
Modes
Accumulator Offset 4-5
Background 5-23
Direct 4-6
Extended 4-5
Immediate 4-4
Indexed 4-5, 4-6
Inherent 4-5
Post-modified index 4-5
Relative 4-5
Saturate 3-4
Modulo addressing 2-1, 11-2
MOVB 5-2, 6-156
MOVW 5-2, 6-157
MUL 5-6, 6-158
Multiplexing 10-2
Multiply and accumulate
Multiplicand register 2-1
Multiplier register 2-1
Sign latch 2-1
–N–
NEG 5-7, 6-159, 8-7
NEGA 5-7, 6-160
NEGB 5-7, 6-161
NEGD 5-7, 6-162
NEGE 5-7, 6-163
NEGW 5-7, 6-164
NOP 6-165, 10-36
NULL 10-3
Null Operations 5-23
F
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