MOTOROLA
6-280
INSTRUCTION GLOSSARY
CPU16
REFERENCE MANUAL
MAC
Multiply and
Accumulate
Signed 16-Bit
Fractions
(HR)
(IR)
E : D
(AM) + (E
:
D)
AM
Qualified (IX)
IX
Qualified (IY)
IY
(HR)
IZ
(M : M + 1)
X
HR
(M : M + 1)
Y
IR
(M
1
)
M
2
IMM8
7B
xoyo
12
—
—
—
—
—
MOVB
Move Byte
IXP to EXT
EXT to IXP
EXT to
EXT
IXP to EXT
EXT to IXP
EXT to
EXT
INH
IND8, X
IND8, Y
IND8, Z
IND16, X
IND16, Y
IND16, Z
EXT
INH
INH
INH
INH
IND16, X
IND16, Y
IND16, Z
EXT
INH
IND8, X
IND8, Y
IND8, Z
IMM8
IND16, X
IND16, Y
IND16, Z
EXT
E, X
E, Y
E, Z
IND8, X
IND8, Y
IND8, Z
IMM8
IND16, X
IND16, Y
IND16, Z
EXT
E, X
E, Y
E, Z
IND8, X
IND8, Y
IND8, Z
IMM16
IND16, X
IND16, Y
IND16, Z
EXT
E, X
E, Y
E, Z
30
32
37FE
ff hh ll
ff hh ll
hh ll hh ll
8
8
10
—
—
—
—
0
—
MOVW
Move Word
(M
:
M + 1
1
)
M : M
+
1
2
31
33
37FF
ff hh ll
ff hh ll
hh ll hh ll
8
8
10
—
—
—
—
0
—
MUL
NEG
Multiply
(A)
(B)
D
$00
(M)
M
3724
02
12
22
1702
1712
1722
1732
3702
3712
27F2
2772
2702
2712
2722
2732
274C
47
57
67
77
1747
1757
1767
1777
2747
2757
2767
C7
D7
E7
F7
17C7
17D7
17E7
17F7
27C7
27D7
27E7
87
97
A7
37B7
37C7
37D7
37E7
37F7
2787
2797
27A7
—
ff
ff
ff
10
8
8
8
8
8
8
8
2
2
2
2
8
8
8
8
2
6
6
6
2
6
6
6
6
6
6
6
6
6
6
2
6
6
6
6
6
6
6
6
6
6
4
6
6
6
6
6
6
6
—
—
—
—
—
—
—
—
—
—
—
Negate Memory
gggg
gggg
gggg
hh ll
—
—
—
—
gggg
gggg
gggg
hh ll
—
ff
ff
ff
ii
gggg
gggg
gggg
hh ll
—
—
—
ff
ff
ff
ii
gggg
gggg
gggg
hh ll
—
—
—
ff
ff
ff
jj kk
gggg
gggg
gggg
hh ll
—
—
—
NEGA
NEGB
NEGD
NEGE
NEGW
Negate A
Negate B
Negate D
Negate E
$00
(A)
A
$00
(B)
B
$0000
(D)
D
$0000
(E)
E
$0000
(M : M
+
1)
M : M
+
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Negate Memory Word
NOP
ORAA
Null Operation
OR A
—
—
—
—
—
—
—
—
—
—
—
—
0
—
—
(A)
(M)
A
ORAB
OR B
(B)
(M)
B
—
—
—
—
0
—
ORD
OR D
(D)
(M : M + 1)
D
—
—
—
—
0
—
Table 6-36 Instruction Set Summary (Continued)
Mnemonic
Operation
Description
Address
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
MV
H
EV
N
Z
V
C
F
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