
Datasheet
7
Intel
Celeron Processor up to 700 MHz
30
Signal Ringback Specifications for Non-AGTL+ Signal Simulation
at the Processor Core (S.E.P. and PPGA Packages) ........................................50
Signal Ringback Guidelines for Non-AGTL+ Signal Edge Finger
Measurement (S.E.P. Package) .........................................................................50
Signal Ringback Specifications for Non-AGTL+ Signal Simulation
at the Processor Pins (FC-PGA Package) .........................................................50
Example Platform Information.............................................................................53
66 MHz AGTL+ Signal Group Overshoot/Undershoot
Tolerance at Processor Pins (FC-PGA Package) ..............................................54
33 MHz CMOS Signal Group Overshoot/Undershoot Tolerance
at Processor Pins (FC-PGA Package) ...............................................................55
Processor Power for the S.E.P. Package 1.........................................................56
Processor Power for the PPGA and FC-PGA Packages 1 .................................57
Thermal Diode Parameters (S.E.P. and PPGA Packages) 4..............................58
Thermal Diode Parameters (FC-PGA Package) ................................................59
Thermal Diode Interface......................................................................................59
S.E.P. Package Signal Listing by Pin Number....................................................62
S.E.P. Package Signal Listing by Signal Name ..................................................66
Package Dimensions (PPGA Package)..............................................................71
Information Summary (PPGA Package)..............................................................71
PPGA Package Signal Listing by Pin Number....................................................73
PPGA Package Signal Listing in Order by Signal Name.....................................78
Package Dimensions...........................................................................................84
Processor Die Loading Parameters (FC-PGA Package) ....................................84
FC-PGA Signal Listing in Order by Signal Name................................................87
FC-PGA Signal Listing in Order by Pin Number..................................................93
Boxed Processor Fan Heatsink Spatial Dimensions for
the S.E.P. Package...........................................................................................101
Boxed Processor Fan Heatsink Spatial Dimensions for the
PPGA and FC-PGA Packages .........................................................................104
Fan Heatsink Power and Signal Specifications.................................................109
Alphabetical Signal Reference..........................................................................111
Output Signals...................................................................................................117
Input Signals......................................................................................................117
Input/Output Signals (Single Driver)..................................................................118
Input/Output Signals (Multiple Driver) ...............................................................118
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