參數(shù)資料
型號： Am79C965A
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述： PCnet？-32單芯片32位以太網(wǎng)控制器
文件頁數(shù)： 126/228頁
文件大?。?/td> 1681K
代理商： AM79C965A
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126
Am79C965A
current receive descriptor to write
status to.
When MISS is set, INTR is as-
serted if IENA = 1 and the mask bit
MISSM in CSR3 is clear. MISS
assertion will set the ERR bit.
MISS
Management Unit and cleared by
writing a
“
1
”
. Writing a
“
0
”
has no
effect. MISS is cleared by H_RESET
or S_RESET or setting the STOP
bit.
is
set
by
the
Buffer
11
MERR Memory Error is set when PCnet-32
controller requests the use of the
system interface bus by asserting
HOLD and has not received HLDA
assertion after a programmable
length of time.The length of time in
microseconds before MERR is
asserted will depend upon the
setting of the Bus Time-Out Register
(CSR100). The default setting of
CSR100 will give a MERR after 51.2
μs of bus latency.
When MERR is set, INTR is as-
serted if IENA = 1
and
the mask bit
MERRM in CSR3 is clear. MERR
assertion will set the ERR bit,
regardless of the settings of IENA
and MERRM.
MERR is set by the Bus Interface
Unit and cleared by writing a
“
1
”
.
Writing a
“
0
”
has no effect. MERR is
cleared by H_RESET or S_RESET
or by setting the STOP bit.
10
RINT
Receive interrupt. RINT is set by the
Buffer Management Unit of the
PCnet-32 controller after the last
descriptor of a receive packet has
been updated by writing a ZERO to
the ownership bit. RINT may
also
be
set when the first descriptor of a
receive packet has been updated by
writing a ZERO to the ownership bit
if
the SPRINTEN bit of CSR3 has
been set to a ONE.
When RINT is set, INTR is asserted
if IENA = 1 and the mask bit RINTM
in CSR3 is clear.
RINT is cleared by the host by
writing a
“
1
”
. Writing a
“
0
”
has no
effect. RINT is cleared by H_RESET
or S_RESET or by setting the STOP
bit.
9
TINT
Transmit interrupt is set after
completion of a transmit frame and
toggling of the OWN bit in the last
buffer in the Transmit Descriptor
Ring.
When TINT is set, INTR is asserted
if IENA = 1 and the mask bit TINTM
in CSR3 is clear.
TINT is set by the Buffer Man-
agement Unit after the last transmit
buffer has been updated and
cleared by writing a
“
1
”
. Writing a
“
0
”
has no effect. TINT is cleared by
H_RESET or S_RESET or setting
the STOP bit.
8
IDON
Initialization Done indicates that the
initialization sequence has
completed. When IDON is set,
PCnet-32 controller has read the
Initialization block from memory.
When IDON is set, INTR is as-
serted if IENA = 1 and the mask bit
IDONM in CSR3 is clear.
IDON
Management Unit after the
initialization block has been read
from memory and cleared by writing
a
“
1
”
. Writing a
“
0
”
has no effect.
IDON is cleared by H_RESET or
S_RESET or setting the STOP bit.
is
set
by
the
Buffer
7
INTR
Interrupt Flag indicates that one or
more following interrupt causing
conditions has occurred: BABL,
MISS, MERR, MFCO, RCVCCO,
RINT, RPCO, TINT, IDON, JAB or
TXSTRT. and its associated mask
bit is clear. If IENA = 1 and INTR is
set, INTR will be active.
INTR is read only. INTR is cleared
by H_RESET or S_RESET or by
setting the STOP bit or by clearing
all of the active individual interrupt
bits that have not been masked out.
6
IENA
Interrupt Enable allows INTR to be
active if the interrupt Flag is set. If
IENA =
“
0
”
then INTR will be
disabled regardless of the state of
INTR.
IENA is set by writing a
“
1
”
and
cleared by writing a
“
0
”
. IENA is
cleared by H_RESET or S_RESET
or setting the STOP bit.
相關PDF資料
PDF描述
AM79C970AKCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
相關代理商/技術參數(shù)
參數(shù)描述
AM79C965AWW WAF 制造商:Advanced Micro Devices 功能描述:
AM79C970 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
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